diff options
author | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:03 -0400 |
---|---|---|
committer | Korey Sewell <ksewell@umich.edu> | 2006-07-07 15:58:03 -0400 |
commit | 74d4d671386252d0d5f570b69fc63cb332757580 (patch) | |
tree | 07eb325d4371418c02cde30b4d5e1787113360e4 /src/cpu | |
parent | 161e8bf874aa14c17fcbb6d1fcad902be7d0ecb6 (diff) | |
download | gem5-74d4d671386252d0d5f570b69fc63cb332757580.tar.xz |
Minor fix for SMT Hello Worlds to finish correctly.
Still, there is a problem with the LSQ and indexing out of range in the buffer.
I havent nailed down the fix yet, but it's coming ...
src/cpu/o3/commit_impl.hh:
add space to DPRINT
src/cpu/o3/cpu.cc:
add newline to DPRINT
src/cpu/o3/rob.hh:
src/cpu/o3/rob_impl.hh:
Each thread needs it's own squashedSeqNum for the case where they are both squashing at the same time and they dont
write over each other's squash number.
--HG--
extra : convert_revision : 2155421a8b5b20e4544eea3d3c53d3e715465fa6
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 2 | ||||
-rw-r--r-- | src/cpu/o3/rob.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/rob_impl.hh | 14 |
4 files changed, 11 insertions, 9 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index dc2c8cbbb..e1f8e1f1e 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -585,7 +585,7 @@ DefaultCommit<Impl>::tick() commitStatus[tid] = Running; } else { DPRINTF(Commit,"[tid:%u]: Still Squashing, cannot commit any" - "insts this cycle.\n", tid); + " insts this cycle.\n", tid); rob->doSquash(tid); toIEW->commitInfo[tid].robSquashing = true; wroteToTimeBuffer = true; diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index ec02a3929..c46276d5a 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -653,7 +653,7 @@ template <class Impl> void FullO3CPU<Impl>::removeThread(unsigned tid) { - DPRINTF(O3CPU,"[tid:%i] Removing thread context from CPU."); + DPRINTF(O3CPU,"[tid:%i] Removing thread context from CPU.\n", tid); // Copy Thread Data From RegFile // If thread is suspended, it might be re-allocated diff --git a/src/cpu/o3/rob.hh b/src/cpu/o3/rob.hh index 6f8080ef4..7cd5a5143 100644 --- a/src/cpu/o3/rob.hh +++ b/src/cpu/o3/rob.hh @@ -308,7 +308,7 @@ class ROB private: /** The sequence number of the squashed instruction. */ - InstSeqNum squashedSeqNum; + InstSeqNum squashedSeqNum[Impl::MaxThreads]; /** Is the ROB done squashing. */ bool doneSquashing[Impl::MaxThreads]; diff --git a/src/cpu/o3/rob_impl.hh b/src/cpu/o3/rob_impl.hh index d9978b17f..1b9f666b8 100644 --- a/src/cpu/o3/rob_impl.hh +++ b/src/cpu/o3/rob_impl.hh @@ -41,10 +41,10 @@ ROB<Impl>::ROB(unsigned _numEntries, unsigned _squashWidth, : numEntries(_numEntries), squashWidth(_squashWidth), numInstsInROB(0), - squashedSeqNum(0), numThreads(_numThreads) { for (int tid=0; tid < numThreads; tid++) { + squashedSeqNum[tid] = 0; doneSquashing[tid] = true; threadEntries[tid] = 0; } @@ -352,11 +352,11 @@ void ROB<Impl>::doSquash(unsigned tid) { DPRINTF(ROB, "[tid:%u]: Squashing instructions until [sn:%i].\n", - tid, squashedSeqNum); + tid, squashedSeqNum[tid]); assert(squashIt[tid] != instList[tid].end()); - if ((*squashIt[tid])->seqNum < squashedSeqNum) { + if ((*squashIt[tid])->seqNum < squashedSeqNum[tid]) { DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", tid); @@ -371,7 +371,7 @@ ROB<Impl>::doSquash(unsigned tid) for (int numSquashed = 0; numSquashed < squashWidth && squashIt[tid] != instList[tid].end() && - (*squashIt[tid])->seqNum > squashedSeqNum; + (*squashIt[tid])->seqNum > squashedSeqNum[tid]; ++numSquashed) { DPRINTF(ROB, "[tid:%u]: Squashing instruction PC %#x, seq num %i.\n", @@ -408,7 +408,7 @@ ROB<Impl>::doSquash(unsigned tid) // Check if ROB is done squashing. - if ((*squashIt[tid])->seqNum <= squashedSeqNum) { + if ((*squashIt[tid])->seqNum <= squashedSeqNum[tid]) { DPRINTF(ROB, "[tid:%u]: Done squashing instructions.\n", tid); @@ -520,7 +520,7 @@ ROB<Impl>::squash(InstSeqNum squash_num,unsigned tid) doneSquashing[tid] = false; - squashedSeqNum = squash_num; + squashedSeqNum[tid] = squash_num; if (!instList[tid].empty()) { InstIt tail_thread = instList[tid].end(); @@ -544,6 +544,7 @@ ROB<Impl>::readHeadInst() } } */ + template <class Impl> typename Impl::DynInstPtr ROB<Impl>::readHeadInst(unsigned tid) @@ -558,6 +559,7 @@ ROB<Impl>::readHeadInst(unsigned tid) return dummyInst; } } + /* template <class Impl> uint64_t |