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| author | Iru Cai <mytbk920423@gmail.com> | 2019-04-01 09:58:48 +0800 |
|---|---|---|
| committer | Iru Cai <mytbk920423@gmail.com> | 2019-04-01 09:58:48 +0800 |
| commit | a1ca6275a05e504a2f8cf9a1b61768da126b266b (patch) | |
| tree | 0526e4e88519c524e78e2ef74945e641e6bda434 /src/cpu | |
| parent | a012519d3e2c151a86d599c308f07e0fd3b5922a (diff) | |
| download | gem5-a1ca6275a05e504a2f8cf9a1b61768da126b266b.tar.xz | |
fix getvaddr nullptr stuff, add a non-spec load printingis-rebase11-LSQUnit
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/o3/lsq_unit.hh | 20 | ||||
| -rw-r--r-- | src/cpu/o3/lsq_unit_impl.hh | 18 |
2 files changed, 25 insertions, 13 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 4f729a4e5..16095ed46 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -842,8 +842,10 @@ LSQUnit<Impl>::read(const RequestPtr &req, sendSpecRead = true; DPRINTF(LSQUnit, "send a spec read for inst [sn:%lli]\n", load_inst->seqNum); + } else { + DPRINTF(LSQUnit, "send a non-spec read for inst [sn:%lli]\n", + load_inst->seqNum); } - } assert( !(sendSpecRead && load_inst->isSpecCompleted()) && @@ -1026,18 +1028,22 @@ LSQUnit<Impl>::read(const RequestPtr &req, load_inst->postSreqLow = std::make_shared<Request>(*sreqLow); load_inst->postSreqHigh = std::make_shared<Request>(*sreqHigh); load_inst->postReq = nullptr; + DPRINTF(LSQUnit, "created validation/expose" + " request for inst [sn:%lli]" + " reqLow=%#x, reqHigh=%#x\n", + load_inst->seqNum, + load_inst->postSreqLow->getVaddr(), + load_inst->postSreqHigh->getVaddr()); }else{ load_inst->postReq = std::make_shared<Request>(*req); load_inst->postSreqLow = nullptr; load_inst->postSreqHigh = nullptr; + DPRINTF(LSQUnit, "created validation/expose" + " request for inst [sn:%lli]" + " req=%#x\n", + load_inst->seqNum, load_inst->postReq->getVaddr()); } load_inst->needDeletePostReq(true); - DPRINTF(LSQUnit, "created validation/expose" - " request for inst [sn:%lli]" - "req=%#x, reqLow=%#x, reqHigh=%#x\n", - load_inst->seqNum, load_inst->postReq->getVaddr(), - load_inst->postSreqLow->getVaddr(), - load_inst->postSreqHigh->getVaddr()); } else { load_inst->setExposeCompleted(); load_inst->needPostFetch(false); diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh index 7f5406885..7462d4c84 100644 --- a/src/cpu/o3/lsq_unit_impl.hh +++ b/src/cpu/o3/lsq_unit_impl.hh @@ -1134,12 +1134,18 @@ LSQUnit<Impl>::exposeLoads() // we should not have both req and sreqLow not NULL assert( !(req && sreqLow)); - DPRINTF(LSQUnit, "Validate/Expose request for inst [sn:%lli]" - " PC= %s. req=%#x, reqLow=%#x, reqHigh=%#x\n", - load_inst->seqNum, load_inst->pcState(), - load_inst->postReq->getVaddr(), - load_inst->postSreqLow->getVaddr(), - load_inst->postSreqHigh->getVaddr()); + if (req) { + DPRINTF(LSQUnit, "Validate/Expose request for inst [sn:%lli]" + " PC= %s. req=%#x\n", + load_inst->seqNum, load_inst->pcState(), + req->getVaddr()); + } else { + DPRINTF(LSQUnit, "Validate/Expose request for inst [sn:%lli]" + " PC= %s. reqLow=%#x, reqHigh=%#x\n", + load_inst->seqNum, load_inst->pcState(), + load_inst->postSreqLow->getVaddr(), + load_inst->postSreqHigh->getVaddr()); + } PacketPtr data_pkt = NULL; PacketPtr snd_data_pkt = NULL; |