arch: Use const StaticInstPtr references where possible

This patch optimises the passing of StaticInstPtr by avoiding copying
the reference-counting pointer. This avoids first incrementing and
then decrementing the reference-counting pointer.

17 files changed, 34 insertions, 32 deletions

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 9346b69cc..b1ebe3f09 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -156,7 +156,7 @@ class BaseDynInst : public ExecContext, public RefCounted
     InstSeqNum seqNum;
 
     /** The StaticInst used by this BaseDynInst. */
-    StaticInstPtr staticInst;
+    const StaticInstPtr staticInst;
 
     /** Pointer to the Impl's CPU object. */
     ImplCPU *cpu;
@@ -204,7 +204,7 @@ class BaseDynInst : public ExecContext, public RefCounted
     TheISA::PCState predPC;
 
     /** The Macroop if one exists */
-    StaticInstPtr macroop;
+    const StaticInstPtr macroop;
 
     /** How many source registers are ready. */
     uint8_t readyRegs;
@@ -427,14 +427,14 @@ class BaseDynInst : public ExecContext, public RefCounted
      *  @param seq_num The sequence number of the instruction.
      *  @param cpu Pointer to the instruction's CPU.
      */
-    BaseDynInst(StaticInstPtr staticInst, StaticInstPtr macroop,
+    BaseDynInst(const StaticInstPtr &staticInst, const StaticInstPtr &macroop,
                 TheISA::PCState pc, TheISA::PCState predPC,
                 InstSeqNum seq_num, ImplCPU *cpu);
 
     /** BaseDynInst constructor given a StaticInst pointer.
      *  @param _staticInst The StaticInst for this BaseDynInst.
      */
-    BaseDynInst(StaticInstPtr staticInst, StaticInstPtr macroop);
+    BaseDynInst(const StaticInstPtr &staticInst, const StaticInstPtr &macroop);
 
     /** BaseDynInst destructor. */
     ~BaseDynInst();
diff --git a/src/cpu/base_dyn_inst_impl.hh b/src/cpu/base_dyn_inst_impl.hh
index 9004fc0f5..976e9ceb0 100644
--- a/src/cpu/base_dyn_inst_impl.hh
+++ b/src/cpu/base_dyn_inst_impl.hh
@@ -59,8 +59,8 @@
 #include "sim/faults.hh"
 
 template <class Impl>
-BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
-                               StaticInstPtr _macroop,
+BaseDynInst<Impl>::BaseDynInst(const StaticInstPtr &_staticInst,
+                               const StaticInstPtr &_macroop,
                                TheISA::PCState _pc, TheISA::PCState _predPC,
                                InstSeqNum seq_num, ImplCPU *cpu)
   : staticInst(_staticInst), cpu(cpu), traceData(NULL), macroop(_macroop)
@@ -74,8 +74,8 @@ BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
 }
 
 template <class Impl>
-BaseDynInst<Impl>::BaseDynInst(StaticInstPtr _staticInst,
-                               StaticInstPtr _macroop)
+BaseDynInst<Impl>::BaseDynInst(const StaticInstPtr &_staticInst,
+                               const StaticInstPtr &_macroop)
     : staticInst(_staticInst), traceData(NULL), macroop(_macroop)
 {
     seqNum = 0;
diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 9743905c1..b64e1bff1 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -303,7 +303,7 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
                         microcodeRom.fetchMicroop(pcState.microPC(), NULL);
                 } else if (!curMacroStaticInst) {
                     //We're not in the middle of a macro instruction
-                    StaticInstPtr instPtr = NULL;
+                    StaticInstPtr instPtr = nullptr;
 
                     //Predecode, ie bundle up an ExtMachInst
                     //If more fetch data is needed, pass it in.
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 9709466b7..9e08dca00 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -56,7 +56,7 @@ ExeTracerRecord::dumpTicks(ostream &outs)
 }
 
 void
-Trace::ExeTracerRecord::traceInst(StaticInstPtr inst, bool ran)
+Trace::ExeTracerRecord::traceInst(const StaticInstPtr &inst, bool ran)
 {
     ostream &outs = Trace::output();
 
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index 6d9f2a337..ebb712af6 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -56,7 +56,7 @@ class ExeTracerRecord : public InstRecord
     {
     }
 
-    void traceInst(StaticInstPtr inst, bool ran);
+    void traceInst(const StaticInstPtr &inst, bool ran);
 
     void dump();
     virtual void dumpTicks(std::ostream &outs);
diff --git a/src/cpu/minor/func_unit.cc b/src/cpu/minor/func_unit.cc
index 1a75c4aa8..65dd1eefc 100644
--- a/src/cpu/minor/func_unit.cc
+++ b/src/cpu/minor/func_unit.cc
@@ -199,7 +199,7 @@ FUPipeline::advance()
 }
 
 MinorFUTiming *
-FUPipeline::findTiming(StaticInstPtr inst)
+FUPipeline::findTiming(const StaticInstPtr &inst)
 {
 #if THE_ISA == ARM_ISA
     /* This should work for any ISA with a POD mach_inst */
diff --git a/src/cpu/minor/func_unit.hh b/src/cpu/minor/func_unit.hh
index 34da579b6..d99e527e8 100644
--- a/src/cpu/minor/func_unit.hh
+++ b/src/cpu/minor/func_unit.hh
@@ -257,7 +257,7 @@ class FUPipeline : public FUPipelineBase, public FuncUnit
 
     /** Find the extra timing information for this instruction.  Returns
      *  NULL if no decode info. is found */
-    MinorFUTiming *findTiming(StaticInstPtr inst);
+    MinorFUTiming *findTiming(const StaticInstPtr &inst);
 
     /** Step the pipeline.  Allow multiple steps? */
     void advance();
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 7ed3944cf..925b3d2d8 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -946,12 +946,13 @@ FullO3CPU<Impl>::processInterrupts(const Fault &interrupt)
     this->interrupts->updateIntrInfo(this->threadContexts[0]);
 
     DPRINTF(O3CPU, "Interrupt %s being handled\n", interrupt->name());
-    this->trap(interrupt, 0, NULL);
+    this->trap(interrupt, 0, nullptr);
 }
 
 template <class Impl>
 void
-FullO3CPU<Impl>::trap(const Fault &fault, ThreadID tid, StaticInstPtr inst)
+FullO3CPU<Impl>::trap(const Fault &fault, ThreadID tid,
+                      const StaticInstPtr &inst)
 {
     // Pass the thread's TC into the invoke method.
     fault->invoke(this->threadContexts[tid], inst);
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index c263790ce..96cd071e4 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -376,7 +376,7 @@ class FullO3CPU : public BaseO3CPU
     { return globalSeqNum++; }
 
     /** Traps to handle given fault. */
-    void trap(const Fault &fault, ThreadID tid, StaticInstPtr inst);
+    void trap(const Fault &fault, ThreadID tid, const StaticInstPtr &inst);
 
     /** HW return from error interrupt. */
     Fault hwrei(ThreadID tid);
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index ea961092d..80d502f0e 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -83,12 +83,13 @@ class BaseO3DynInst : public BaseDynInst<Impl>
 
   public:
     /** BaseDynInst constructor given a binary instruction. */
-    BaseO3DynInst(StaticInstPtr staticInst, StaticInstPtr macroop,
+    BaseO3DynInst(const StaticInstPtr &staticInst, const StaticInstPtr &macroop,
                   TheISA::PCState pc, TheISA::PCState predPC,
                   InstSeqNum seq_num, O3CPU *cpu);
 
     /** BaseDynInst constructor given a static inst pointer. */
-    BaseO3DynInst(StaticInstPtr _staticInst, StaticInstPtr _macroop);
+    BaseO3DynInst(const StaticInstPtr &_staticInst,
+                  const StaticInstPtr &_macroop);
 
     ~BaseO3DynInst();
 
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index e51054f8d..fa3ce28fa 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -49,8 +49,8 @@
 #include "debug/O3PipeView.hh"
 
 template <class Impl>
-BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
-                                   StaticInstPtr macroop,
+BaseO3DynInst<Impl>::BaseO3DynInst(const StaticInstPtr &staticInst,
+                                   const StaticInstPtr &macroop,
                                    TheISA::PCState pc, TheISA::PCState predPC,
                                    InstSeqNum seq_num, O3CPU *cpu)
     : BaseDynInst<Impl>(staticInst, macroop, pc, predPC, seq_num, cpu)
@@ -59,8 +59,8 @@ BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr staticInst,
 }
 
 template <class Impl>
-BaseO3DynInst<Impl>::BaseO3DynInst(StaticInstPtr _staticInst,
-                                   StaticInstPtr _macroop)
+BaseO3DynInst<Impl>::BaseO3DynInst(const StaticInstPtr &_staticInst,
+                                   const StaticInstPtr &_macroop)
     : BaseDynInst<Impl>(_staticInst, _macroop)
 {
     initVars();
diff --git a/src/cpu/pred/bpred_unit.hh b/src/cpu/pred/bpred_unit.hh
index f75ab79d5..bca64cce0 100644
--- a/src/cpu/pred/bpred_unit.hh
+++ b/src/cpu/pred/bpred_unit.hh
@@ -87,9 +87,9 @@ class BPredUnit : public SimObject
      * @param tid The thread id.
      * @return Returns if the branch is taken or not.
      */
-    bool predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
+    bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
                  TheISA::PCState &pc, ThreadID tid);
-    bool predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
+    bool predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
                         int asid, TheISA::PCState &instPC,
                         TheISA::PCState &predPC, ThreadID tid);
 
diff --git a/src/cpu/pred/bpred_unit_impl.hh b/src/cpu/pred/bpred_unit_impl.hh
index eaffb7ea1..53ec808b6 100644
--- a/src/cpu/pred/bpred_unit_impl.hh
+++ b/src/cpu/pred/bpred_unit_impl.hh
@@ -129,7 +129,7 @@ BPredUnit::drainSanityCheck() const
 }
 
 bool
-BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
+BPredUnit::predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
                    TheISA::PCState &pc, ThreadID tid)
 {
     // See if branch predictor predicts taken.
@@ -244,7 +244,7 @@ BPredUnit::predict(StaticInstPtr &inst, const InstSeqNum &seqNum,
 }
 
 bool
-BPredUnit::predictInOrder(StaticInstPtr &inst, const InstSeqNum &seqNum,
+BPredUnit::predictInOrder(const StaticInstPtr &inst, const InstSeqNum &seqNum,
                           int asid, TheISA::PCState &instPC,
                           TheISA::PCState &predPC, ThreadID tid)
 {
diff --git a/src/cpu/profile.hh b/src/cpu/profile.hh
index 8fb0e3a8e..9d683959c 100644
--- a/src/cpu/profile.hh
+++ b/src/cpu/profile.hh
@@ -73,7 +73,7 @@ class FunctionProfile
     FunctionProfile(const SymbolTable *symtab);
     ~FunctionProfile();
 
-    ProfileNode *consume(ThreadContext *tc, StaticInstPtr inst);
+    ProfileNode *consume(ThreadContext *tc, const StaticInstPtr &inst);
     ProfileNode *consume(const std::vector<Addr> &stack);
     void clear();
     void dump(ThreadContext *tc, std::ostream &out) const;
@@ -81,7 +81,7 @@ class FunctionProfile
 };
 
 inline ProfileNode *
-FunctionProfile::consume(ThreadContext *tc, StaticInstPtr inst)
+FunctionProfile::consume(ThreadContext *tc, const StaticInstPtr &inst)
 {
     if (!trace.trace(tc, inst))
         return NULL;
diff --git a/src/cpu/simple/probes/simpoint.cc b/src/cpu/simple/probes/simpoint.cc
index 22eaad086..f2c0be62b 100644
--- a/src/cpu/simple/probes/simpoint.cc
+++ b/src/cpu/simple/probes/simpoint.cc
@@ -77,7 +77,7 @@ void
 SimPoint::profile(const std::pair<SimpleThread*, StaticInstPtr>& p)
 {
     SimpleThread* thread = p.first;
-    StaticInstPtr inst = p.second;
+    const StaticInstPtr &inst = p.second;
 
     if (!currentBBVInstCount)
         currentBBV.first = thread->pcState().instAddr();
diff --git a/src/cpu/timing_expr.cc b/src/cpu/timing_expr.cc
index d6d904956..36a643ed2 100644
--- a/src/cpu/timing_expr.cc
+++ b/src/cpu/timing_expr.cc
@@ -40,7 +40,7 @@
 #include "base/intmath.hh"
 #include "cpu/timing_expr.hh"
 
-TimingExprEvalContext::TimingExprEvalContext (StaticInstPtr inst_,
+TimingExprEvalContext::TimingExprEvalContext(const StaticInstPtr &inst_,
     ThreadContext *thread_,
     TimingExprLet *let_) :
     inst(inst_), thread(thread_), let(let_)
diff --git a/src/cpu/timing_expr.hh b/src/cpu/timing_expr.hh
index d2c38ea90..0ec189437 100644
--- a/src/cpu/timing_expr.hh
+++ b/src/cpu/timing_expr.hh
@@ -73,7 +73,7 @@ class TimingExprEvalContext
 {
   public:
     /** Special visible context */
-    StaticInstPtr inst;
+    const StaticInstPtr &inst;
     ThreadContext *thread;
 
     /** Context visible as sub expressions.  results will hold the results
@@ -83,7 +83,7 @@ class TimingExprEvalContext
     std::vector<uint64_t> results;
     std::vector<bool > resultAvailable;
 
-    TimingExprEvalContext(StaticInstPtr inst_,
+    TimingExprEvalContext(const StaticInstPtr &inst_,
         ThreadContext *thread_, TimingExprLet *let_);
 };