merge mips fix and statetrace changes

4 files changed, 11 insertions, 8 deletions

diff --git a/src/cpu/NativeTrace.py b/src/cpu/NativeTrace.py
index 7fd240543..dba6de067 100644
--- a/src/cpu/NativeTrace.py
+++ b/src/cpu/NativeTrace.py
@@ -28,9 +28,9 @@
 
 from m5.SimObject import SimObject
 from m5.params import *
-from InstTracer import InstTracer
+from ExeTracer import ExeTracer
 
-class NativeTrace(InstTracer):
+class NativeTrace(ExeTracer):
     abstract = True
     type = 'NativeTrace'
     cxx_class = 'Trace::NativeTrace'
diff --git a/src/cpu/nativetrace.cc b/src/cpu/nativetrace.cc
index 47c58434f..8c17eb825 100644
--- a/src/cpu/nativetrace.cc
+++ b/src/cpu/nativetrace.cc
@@ -38,7 +38,7 @@ using namespace std;
 namespace Trace {
 
 NativeTrace::NativeTrace(const Params *p)
-    : InstTracer(p)
+    : ExeTracer(p)
 {
     if (ListenSocket::allDisabled())
         fatal("All listeners are disabled!");
diff --git a/src/cpu/nativetrace.hh b/src/cpu/nativetrace.hh
index 34869f263..6ad6b0242 100644
--- a/src/cpu/nativetrace.hh
+++ b/src/cpu/nativetrace.hh
@@ -37,8 +37,8 @@
 #include "base/socket.hh"
 #include "base/trace.hh"
 #include "base/types.hh"
+#include "cpu/exetrace.hh"
 #include "cpu/static_inst.hh"
-#include "sim/insttracer.hh"
 
 class ThreadContext;
 
@@ -46,7 +46,7 @@ namespace Trace {
 
 class NativeTrace;
 
-class NativeTraceRecord : public InstRecord
+class NativeTraceRecord : public ExeTracerRecord
 {
   protected:
     NativeTrace * parent;
@@ -56,7 +56,7 @@ class NativeTraceRecord : public InstRecord
                Tick _when, ThreadContext *_thread,
                const StaticInstPtr _staticInst, Addr _pc, bool spec,
                const StaticInstPtr _macroStaticInst = NULL, MicroPC _upc = 0)
-        : InstRecord(_when, _thread, _staticInst, _pc, spec,
+        : ExeTracerRecord(_when, _thread, _staticInst, _pc, spec,
                 _macroStaticInst, _upc),
         parent(_parent)
     {
@@ -65,7 +65,7 @@ class NativeTraceRecord : public InstRecord
     void dump();
 };
 
-class NativeTrace : public InstTracer
+class NativeTrace : public ExeTracer
 {
   protected:
     int fd;
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index d9d624e77..8a44eba37 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -262,7 +262,9 @@ class SimpleThread : public ThreadState
     {
         int flatIndex = isa.flattenIntIndex(reg_idx);
         assert(flatIndex < TheISA::NumIntRegs);
-        return intRegs[flatIndex];
+        uint64_t regVal = intRegs[flatIndex];
+        DPRINTF(IntRegs, "Reading int reg %d as %#x.\n", reg_idx, regVal);
+        return regVal;
     }
 
     FloatReg readFloatReg(int reg_idx)
@@ -283,6 +285,7 @@ class SimpleThread : public ThreadState
     {
         int flatIndex = isa.flattenIntIndex(reg_idx);
         assert(flatIndex < TheISA::NumIntRegs);
+        DPRINTF(IntRegs, "Setting int reg %d to %#x.\n", reg_idx, val);
         intRegs[flatIndex] = val;
     }