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author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-07 18:47:33 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-07 18:47:33 -0500 |
commit | 0f8fd5fd689a3631a5896a1c098e6e561aa6a80e (patch) | |
tree | a68ef07e59e436d00b795f0850dafa00edd6693e /src/cpu | |
parent | 41051f35acc36c0401eaf7312a284aef17e0f882 (diff) | |
download | gem5-0f8fd5fd689a3631a5896a1c098e6e561aa6a80e.tar.xz |
Fix for squashing during a serializing instruction.
--HG--
extra : convert_revision : 04f9131258bfb7cca1654e00273edb29bde2366b
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/o3/rename.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/rename_impl.hh | 40 |
2 files changed, 37 insertions, 7 deletions
diff --git a/src/cpu/o3/rename.hh b/src/cpu/o3/rename.hh index 177b9cb87..1ede6f355 100644 --- a/src/cpu/o3/rename.hh +++ b/src/cpu/o3/rename.hh @@ -411,6 +411,10 @@ class DefaultRename /** Whether or not rename needs to block this cycle. */ bool blockThisCycle; + /** Whether or not rename needs to resume a serialize instruction + * after squashing. */ + bool resumeSerialize; + /** The number of threads active in rename. */ unsigned numThreads; diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 84ccf6d5b..0c211b183 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -43,6 +43,7 @@ DefaultRename<Impl>::DefaultRename(Params *params) commitToRenameDelay(params->commitToRenameDelay), renameWidth(params->renameWidth), commitWidth(params->commitWidth), + resumeSerialize(false), numThreads(params->numberOfThreads), maxPhysicalRegs(params->numPhysIntRegs + params->numPhysFloatRegs) { @@ -334,12 +335,22 @@ DefaultRename<Impl>::squash(const InstSeqNum &squash_seq_num, unsigned tid) // If it still needs to block, the blocking should happen the next // cycle and there should be space to hold everything due to the squash. if (renameStatus[tid] == Blocked || - renameStatus[tid] == Unblocking || - renameStatus[tid] == SerializeStall) { - + renameStatus[tid] == Unblocking) { toDecode->renameUnblock[tid] = 1; + resumeSerialize = false; serializeInst[tid] = NULL; + } else if (renameStatus[tid] == SerializeStall) { + if (serializeInst[tid]->seqNum <= squash_seq_num) { + DPRINTF(Rename, "Rename will resume serializing after squash\n"); + resumeSerialize = true; + assert(serializeInst[tid]); + } else { + resumeSerialize = false; + toDecode->renameUnblock[tid] = 1; + + serializeInst[tid] = NULL; + } } // Set the status to Squashing. @@ -477,6 +488,14 @@ DefaultRename<Impl>::rename(bool &status_change, unsigned tid) ++renameSquashCycles; } else if (renameStatus[tid] == SerializeStall) { ++renameSerializeStallCycles; + // If we are currently in SerializeStall and resumeSerialize + // was set, then that means that we are resuming serializing + // this cycle. Tell the previous stages to block. + if (resumeSerialize) { + resumeSerialize = false; + block(tid); + toDecode->renameUnblock[tid] = false; + } } if (renameStatus[tid] == Running || @@ -1245,12 +1264,19 @@ DefaultRename<Impl>::checkSignalsAndUpdate(unsigned tid) if (renameStatus[tid] == Squashing) { // Switch status to running if rename isn't being told to block or // squash this cycle. - DPRINTF(Rename, "[tid:%u]: Done squashing, switching to running.\n", - tid); + if (!resumeSerialize) { + DPRINTF(Rename, "[tid:%u]: Done squashing, switching to running.\n", + tid); - renameStatus[tid] = Running; + renameStatus[tid] = Running; + return false; + } else { + DPRINTF(Rename, "[tid:%u]: Done squashing, switching to serialize.\n", + tid); - return false; + renameStatus[tid] = SerializeStall; + return true; + } } if (renameStatus[tid] == SerializeStall) { |