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authorGabe Black <gblack@eecs.umich.edu>2006-12-20 20:44:06 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-20 20:44:06 -0500
commit327f451eb758b925fe64d7e8d1d6b27bd97fb692 (patch)
treeefba04082615b60eb0565ba90adf6fc652012f5c /src/cpu
parentf13155393df010665b468db5e2e64131a7b2c5da (diff)
downloadgem5-327f451eb758b925fe64d7e8d1d6b27bd97fb692.tar.xz
Fixes to get ALPHA_FS and ALPHA_SE to compile again.
--HG-- extra : convert_revision : 6e0913903d4cbda6f31bec3b5d725b9c08dc1419
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/alpha/dyn_inst.hh5
-rw-r--r--src/cpu/o3/alpha/dyn_inst_impl.hh5
-rw-r--r--src/cpu/o3/fetch_impl.hh7
3 files changed, 10 insertions, 7 deletions
diff --git a/src/cpu/o3/alpha/dyn_inst.hh b/src/cpu/o3/alpha/dyn_inst.hh
index ee895d77c..603a1b52d 100644
--- a/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@ -73,8 +73,9 @@ class AlphaDynInst : public BaseDynInst<Impl>
public:
/** BaseDynInst constructor given a binary instruction. */
- AlphaDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC, InstSeqNum seq_num,
- O3CPU *cpu);
+ AlphaDynInst(ExtMachInst inst, Addr PC, Addr NPC,
+ Addr Pred_PC, Addr Pred_NPC,
+ InstSeqNum seq_num, O3CPU *cpu);
/** BaseDynInst constructor given a static inst pointer. */
AlphaDynInst(StaticInstPtr &_staticInst);
diff --git a/src/cpu/o3/alpha/dyn_inst_impl.hh b/src/cpu/o3/alpha/dyn_inst_impl.hh
index 02432f721..50cdec408 100644
--- a/src/cpu/o3/alpha/dyn_inst_impl.hh
+++ b/src/cpu/o3/alpha/dyn_inst_impl.hh
@@ -31,9 +31,10 @@
#include "cpu/o3/alpha/dyn_inst.hh"
template <class Impl>
-AlphaDynInst<Impl>::AlphaDynInst(ExtMachInst inst, Addr PC, Addr Pred_PC,
+AlphaDynInst<Impl>::AlphaDynInst(ExtMachInst inst, Addr PC, Addr NPC,
+ Addr Pred_PC, Addr Pred_NPC,
InstSeqNum seq_num, O3CPU *cpu)
- : BaseDynInst<Impl>(inst, PC, Pred_PC, seq_num, cpu)
+ : BaseDynInst<Impl>(inst, PC, NPC, Pred_PC, Pred_NPC, seq_num, cpu)
{
initVars();
}
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 815935db3..07d02b20b 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1256,10 +1256,11 @@ DefaultFetch<Impl>::fetch(bool &status_change)
ext_inst = TheISA::NoopMachInst;
// Create a new DynInst from the dummy nop.
- DynInstPtr instruction = new DynInst(ext_inst, fetch_PC,
- next_PC,
+ DynInstPtr instruction = new DynInst(ext_inst,
+ fetch_PC, fetch_NPC,
+ next_PC, next_NPC,
inst_seq, cpu);
- instruction->setPredTarg(next_PC + instSize);
+ instruction->setPredTarg(next_PC, next_NPC);
instruction->setTid(tid);
instruction->setASID(tid);