Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version.

--HG--
extra : convert_revision : b33ce0ebe2fee86cc791c00a35d8c6e395e1380c

7 files changed, 101 insertions, 81 deletions

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index 4a4555566..9037c96df 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -406,14 +406,15 @@ class BaseDynInst : public FastAlloc, public RefCounted
     double readDoubleResult() { return instResult.dbl; }
 
     /** Records an integer register being set to a value. */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         if (recordResult)
             instResult.integer = val;
     }
 
     /** Records an fp register being set to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         if (recordResult) {
             if (width == 32)
@@ -426,21 +427,22 @@ class BaseDynInst : public FastAlloc, public RefCounted
     }
 
     /** Records an fp register being set to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         if (recordResult)
             instResult.dbl = (double)val;
     }
 
     /** Records an fp register being set to an integer value. */
-    void setFloatRegBits(const StaticInst *si, int idx, uint64_t val, int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx, uint64_t val,
+                                int width)
     {
         if (recordResult)
             instResult.integer = val;
     }
 
     /** Records an fp register being set to an integer value. */
-    void setFloatRegBits(const StaticInst *si, int idx, uint64_t val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx, uint64_t val)
     {
         if (recordResult)
             instResult.integer = val;
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 9be54529f..3e08193ee 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -216,42 +216,44 @@ class CheckerCPU : public BaseCPU
     // storage (which is pretty hard to imagine they would have reason
     // to do).
 
-    uint64_t readIntReg(const StaticInst *si, int idx)
+    uint64_t readIntRegOperand(const StaticInst *si, int idx)
     {
         return thread->readIntReg(si->srcRegIdx(idx));
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatReg(reg_idx, width);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatReg(reg_idx);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatRegBits(reg_idx, width);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatRegBits(reg_idx);
     }
 
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         thread->setIntReg(si->destRegIdx(idx), val);
         result.integer = val;
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatReg(reg_idx, val, width);
@@ -265,22 +267,23 @@ class CheckerCPU : public BaseCPU
         };
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatReg(reg_idx, val);
         result.dbl = (double)val;
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val,
-                         int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatRegBits(reg_idx, val, width);
         result.integer = val;
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatRegBits(reg_idx, val);
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 13f70fa79..edccd747f 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -48,39 +48,42 @@ class ExecContext {
     // to do).
 
     /** Reads an integer register. */
-    uint64_t readIntReg(const StaticInst *si, int idx);
+    uint64_t readIntRegOperand(const StaticInst *si, int idx);
 
     /** Reads a floating point register of a specific width. */
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width);
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width);
 
     /** Reads a floating point register of single register width. */
-    FloatReg readFloatReg(const StaticInst *si, int idx);
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx);
 
     /** Reads a floating point register of a specific width in its
      * binary format, instead of by value. */
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width);
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width);
 
     /** Reads a floating point register in its binary format, instead
      * of by value. */
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx);
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx);
 
     /** Sets an integer register to a value. */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val);
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val);
 
     /** Sets a floating point register of a specific width to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width);
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width);
 
     /** Sets a floating point register of single width to a value. */
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val);
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val);
 
     /** Sets the bits of a floating point register of a specific width
      * to a binary value. */
-    void setFloatRegBits(const StaticInst *si, int idx,
-                         FloatRegBits val, int width);
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width);
 
     /** Sets the bits of a floating point register of single width
      * to a binary value. */
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val);
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val);
 
     /** Reads the PC. */
     uint64_t readPC();
diff --git a/src/cpu/o3/alpha/dyn_inst.hh b/src/cpu/o3/alpha/dyn_inst.hh
index 31df8ff78..49cc5a201 100644
--- a/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@ -163,27 +163,28 @@ class AlphaDynInst : public BaseDynInst<Impl>
     // storage (which is pretty hard to imagine they would have reason
     // to do).
 
-    uint64_t readIntReg(const StaticInst *si, int idx)
+    uint64_t readIntRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readIntReg(_srcRegIdx[idx]);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
     {
         return this->cpu->readFloatReg(_srcRegIdx[idx], width);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readFloatReg(_srcRegIdx[idx]);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width)
     {
         return this->cpu->readFloatRegBits(_srcRegIdx[idx], width);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
     {
         return this->cpu->readFloatRegBits(_srcRegIdx[idx]);
     }
@@ -191,35 +192,37 @@ class AlphaDynInst : public BaseDynInst<Impl>
     /** @todo: Make results into arrays so they can handle multiple dest
      *  registers.
      */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         this->cpu->setIntReg(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setIntReg(si, idx, val);
+        BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         this->cpu->setFloatReg(_destRegIdx[idx], val, width);
-        BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
+        BaseDynInst<Impl>::setFloatRegOperand(si, idx, val, width);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         this->cpu->setFloatReg(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setFloatReg(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx,
-            FloatRegBits val, int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width)
     {
         this->cpu->setFloatRegBits(_destRegIdx[idx], val, width);
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val)
     {
         this->cpu->setFloatRegBits(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
     }
 
     /** Returns the physical register index of the i'th destination
diff --git a/src/cpu/o3/mips/dyn_inst.hh b/src/cpu/o3/mips/dyn_inst.hh
index 9e95b2bfb..833371e00 100755
--- a/src/cpu/o3/mips/dyn_inst.hh
+++ b/src/cpu/o3/mips/dyn_inst.hh
@@ -156,27 +156,28 @@ class MipsDynInst : public BaseDynInst<Impl>
     // storage (which is pretty hard to imagine they would have reason
     // to do).
 
-    uint64_t readIntReg(const StaticInst *si, int idx)
+    uint64_t readIntRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readIntReg(_srcRegIdx[idx]);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
     {
         return this->cpu->readFloatReg(_srcRegIdx[idx], width);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readFloatReg(_srcRegIdx[idx]);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width)
     {
         return this->cpu->readFloatRegBits(_srcRegIdx[idx], width);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
     {
         return this->cpu->readFloatRegBits(_srcRegIdx[idx]);
     }
@@ -184,35 +185,37 @@ class MipsDynInst : public BaseDynInst<Impl>
     /** @todo: Make results into arrays so they can handle multiple dest
      *  registers.
      */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         this->cpu->setIntReg(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setIntReg(si, idx, val);
+        BaseDynInst<Impl>::setIntRegOperand(si, idx, val);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         this->cpu->setFloatReg(_destRegIdx[idx], val, width);
-        BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
+        BaseDynInst<Impl>::setFloatRegOperand(si, idx, val, width);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         this->cpu->setFloatReg(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setFloatReg(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperand(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx,
-            FloatRegBits val, int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width)
     {
         this->cpu->setFloatRegBits(_destRegIdx[idx], val, width);
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val)
     {
         this->cpu->setFloatRegBits(_destRegIdx[idx], val);
-        BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
+        BaseDynInst<Impl>::setFloatRegOperandBits(si, idx, val);
     }
 
     /** Returns the physical register index of the i'th destination
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index 9445a5309..88f96b14b 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -146,12 +146,12 @@ class OzoneDynInst : public BaseDynInst<Impl>
     // storage (which is pretty hard to imagine they would have reason
     // to do).
 
-    uint64_t readIntReg(const StaticInst *si, int idx)
+    uint64_t readIntRegOperand(const StaticInst *si, int idx)
     {
         return srcInsts[idx]->readIntResult();
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
     {
         switch(width) {
           case 32:
@@ -164,17 +164,18 @@ class OzoneDynInst : public BaseDynInst<Impl>
         }
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         return srcInsts[idx]->readFloatResult();
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width)
     {
         return srcInsts[idx]->readIntResult();
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
     {
         return srcInsts[idx]->readIntResult();
     }
@@ -182,28 +183,30 @@ class OzoneDynInst : public BaseDynInst<Impl>
     /** @todo: Make results into arrays so they can handle multiple dest
      *  registers.
      */
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         BaseDynInst<Impl>::setIntReg(si, idx, val);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         BaseDynInst<Impl>::setFloatReg(si, idx, val, width);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         BaseDynInst<Impl>::setFloatReg(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx,
-            FloatRegBits val, int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width)
     {
         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val)
     {
         BaseDynInst<Impl>::setFloatRegBits(si, idx, val);
     }
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index efb884325..c39bfa9cd 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -213,60 +213,63 @@ class BaseSimpleCPU : public BaseCPU
     // storage (which is pretty hard to imagine they would have reason
     // to do).
 
-    uint64_t readIntReg(const StaticInst *si, int idx)
+    uint64_t readIntRegOperand(const StaticInst *si, int idx)
     {
         return thread->readIntReg(si->srcRegIdx(idx));
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx, int width)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx, int width)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatReg(reg_idx, width);
     }
 
-    FloatReg readFloatReg(const StaticInst *si, int idx)
+    FloatReg readFloatRegOperand(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatReg(reg_idx);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx, int width)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx,
+                                         int width)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatRegBits(reg_idx, width);
     }
 
-    FloatRegBits readFloatRegBits(const StaticInst *si, int idx)
+    FloatRegBits readFloatRegOperandBits(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::FP_Base_DepTag;
         return thread->readFloatRegBits(reg_idx);
     }
 
-    void setIntReg(const StaticInst *si, int idx, uint64_t val)
+    void setIntRegOperand(const StaticInst *si, int idx, uint64_t val)
     {
         thread->setIntReg(si->destRegIdx(idx), val);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val, int width)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val,
+                            int width)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatReg(reg_idx, val, width);
     }
 
-    void setFloatReg(const StaticInst *si, int idx, FloatReg val)
+    void setFloatRegOperand(const StaticInst *si, int idx, FloatReg val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatReg(reg_idx, val);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx,
-                         FloatRegBits val, int width)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val, int width)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatRegBits(reg_idx, val, width);
     }
 
-    void setFloatRegBits(const StaticInst *si, int idx, FloatRegBits val)
+    void setFloatRegOperandBits(const StaticInst *si, int idx,
+                                FloatRegBits val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::FP_Base_DepTag;
         thread->setFloatRegBits(reg_idx, val);