diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2008-10-11 02:27:21 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2008-10-11 02:27:21 -0700 |
commit | da7209ec93f3cdad11c02906357f06fa29652996 (patch) | |
tree | 54847aa95a3dc16e94d42f985722b5dac0322ad9 /src/cpu | |
parent | 3af428606ad35e2cd40d5d1d39010ff732bfee4f (diff) | |
download | gem5-da7209ec93f3cdad11c02906357f06fa29652996.tar.xz |
CPU: Eliminate the hwrei function.
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/checker/cpu.hh | 1 | ||||
-rw-r--r-- | src/cpu/exec_context.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/cpu.cc | 15 | ||||
-rw-r--r-- | src/cpu/o3/cpu.hh | 3 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/dyn_inst_impl.hh | 22 | ||||
-rw-r--r-- | src/cpu/ozone/cpu.hh | 1 | ||||
-rw-r--r-- | src/cpu/ozone/cpu_impl.hh | 15 | ||||
-rw-r--r-- | src/cpu/ozone/dyn_inst.hh | 1 | ||||
-rw-r--r-- | src/cpu/ozone/dyn_inst_impl.hh | 15 | ||||
-rw-r--r-- | src/cpu/simple/base.hh | 1 | ||||
-rw-r--r-- | src/cpu/simple_thread.hh | 2 |
12 files changed, 0 insertions, 82 deletions
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh index 5b3c4582c..b234bf23f 100644 --- a/src/cpu/checker/cpu.hh +++ b/src/cpu/checker/cpu.hh @@ -336,7 +336,6 @@ class CheckerCPU : public BaseCPU void translateDataReadReq(Request *req); #if FULL_SYSTEM - Fault hwrei() { return thread->hwrei(); } void ev5_trap(Fault fault) { fault->invoke(tc); } bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } #else diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh index 2b9fe4bcf..93192246c 100644 --- a/src/cpu/exec_context.hh +++ b/src/cpu/exec_context.hh @@ -144,10 +144,6 @@ class ExecContext { void writeHint(Addr addr, int size, unsigned flags); #if FULL_SYSTEM - /** Somewhat Alpha-specific function that handles returning from - * an error or interrupt. */ - Fault hwrei(); - /** * Check for special simulator handling of specific PAL calls. If * return value is false, actual PAL call will be suppressed. diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc index eb1115565..174f4a98d 100644 --- a/src/cpu/o3/cpu.cc +++ b/src/cpu/o3/cpu.cc @@ -906,21 +906,6 @@ FullO3CPU<Impl>::post_interrupt(int int_num, int index) } template <class Impl> -Fault -FullO3CPU<Impl>::hwrei(unsigned tid) -{ -#if THE_ISA == ALPHA_ISA - // Need to clear the lock flag upon returning from an interrupt. - this->setMiscRegNoEffect(AlphaISA::MISCREG_LOCKFLAG, false, tid); - - this->thread[tid]->kernelStats->hwrei(); - - // FIXME: XXX check for interrupts? XXX -#endif - return NoFault; -} - -template <class Impl> bool FullO3CPU<Impl>::simPalCheck(int palFunc, unsigned tid) { diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh index 406d965be..cdc1d2e58 100644 --- a/src/cpu/o3/cpu.hh +++ b/src/cpu/o3/cpu.hh @@ -414,9 +414,6 @@ class FullO3CPU : public BaseO3CPU /** Posts an interrupt. */ void post_interrupt(int int_num, int index); - /** HW return from error interrupt. */ - Fault hwrei(unsigned tid); - bool simPalCheck(int palFunc, unsigned tid); /** Returns the Fault for any valid interrupt. */ diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh index 292547b6b..ce59d802b 100644 --- a/src/cpu/o3/dyn_inst.hh +++ b/src/cpu/o3/dyn_inst.hh @@ -168,8 +168,6 @@ class BaseO3DynInst : public BaseDynInst<Impl> } #if FULL_SYSTEM - /** Calls hardware return from error interrupt. */ - Fault hwrei(); /** Traps to handle specified fault. */ void trap(Fault fault); bool simPalCheck(int palFunc); diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh index 6398a3afe..f85527f22 100644 --- a/src/cpu/o3/dyn_inst_impl.hh +++ b/src/cpu/o3/dyn_inst_impl.hh @@ -125,28 +125,6 @@ BaseO3DynInst<Impl>::completeAcc(PacketPtr pkt) #if FULL_SYSTEM template <class Impl> -Fault -BaseO3DynInst<Impl>::hwrei() -{ -#if THE_ISA == ALPHA_ISA - // Can only do a hwrei when in pal mode. - if (!(this->readPC() & 0x3)) - return new AlphaISA::UnimplementedOpcodeFault; - - // Set the next PC based on the value of the EXC_ADDR IPR. - this->setNextPC(this->cpu->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR, - this->threadNumber)); - - // Tell CPU to clear any state it needs to if a hwrei is taken. - this->cpu->hwrei(this->threadNumber); -#else - -#endif - // FIXME: XXX check for interrupts? XXX - return NoFault; -} - -template <class Impl> void BaseO3DynInst<Impl>::trap(Fault fault) { diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh index c3ea33673..e95accdfd 100644 --- a/src/cpu/ozone/cpu.hh +++ b/src/cpu/ozone/cpu.hh @@ -510,7 +510,6 @@ class OzoneCPU : public BaseCPU void dumpInsts() { frontEnd->dumpInsts(); } #if FULL_SYSTEM - Fault hwrei(); bool simPalCheck(int palFunc); void processInterrupts(); #else diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh index ceb980d4c..eb7b1a13f 100644 --- a/src/cpu/ozone/cpu_impl.hh +++ b/src/cpu/ozone/cpu_impl.hh @@ -669,21 +669,6 @@ OzoneCPU<Impl>::setSyscallReturn(SyscallReturn return_value, int tid) } #else template <class Impl> -Fault -OzoneCPU<Impl>::hwrei() -{ - // Need to move this to ISA code - // May also need to make this per thread - - lockFlag = false; - lockAddrList.clear(); - thread.kernelStats->hwrei(); - - // FIXME: XXX check for interrupts? XXX - return NoFault; -} - -template <class Impl> void OzoneCPU<Impl>::processInterrupts() { diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh index e138cbe13..deade9397 100644 --- a/src/cpu/ozone/dyn_inst.hh +++ b/src/cpu/ozone/dyn_inst.hh @@ -240,7 +240,6 @@ class OzoneDynInst : public BaseDynInst<Impl> void setMiscReg(int misc_reg, const MiscReg &val); #if FULL_SYSTEM - Fault hwrei(); void trap(Fault fault); bool simPalCheck(int palFunc); #else diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh index 8519917f5..8fc5077a6 100644 --- a/src/cpu/ozone/dyn_inst_impl.hh +++ b/src/cpu/ozone/dyn_inst_impl.hh @@ -249,21 +249,6 @@ OzoneDynInst<Impl>::setMiscReg(int misc_reg, const MiscReg &val) #if FULL_SYSTEM template <class Impl> -Fault -OzoneDynInst<Impl>::hwrei() -{ - if (!(this->readPC() & 0x3)) - return new AlphaISA::UnimplementedOpcodeFault; - - this->setNextPC(this->thread->readMiscRegNoEffect(AlphaISA::IPR_EXC_ADDR)); - - this->cpu->hwrei(); - - // FIXME: XXX check for interrupts? XXX - return NoFault; -} - -template <class Impl> void OzoneDynInst<Impl>::trap(Fault fault) { diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index b7fcf1708..b28a690bb 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -413,7 +413,6 @@ class BaseSimpleCPU : public BaseCPU //Fault CacheOp(uint8_t Op, Addr EA); #if FULL_SYSTEM - Fault hwrei() { return thread->hwrei(); } void ev5_trap(Fault fault) { fault->invoke(tc); } bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); } #else diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh index 377bfcd79..89d5ba99f 100644 --- a/src/cpu/simple_thread.hh +++ b/src/cpu/simple_thread.hh @@ -185,8 +185,6 @@ class SimpleThread : public ThreadState void dumpFuncProfile(); - Fault hwrei(); - bool simPalCheck(int palFunc); #endif |