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authorKevin Lim <ktlim@umich.edu>2007-04-04 16:50:48 -0400
committerKevin Lim <ktlim@umich.edu>2007-04-04 16:50:48 -0400
commit3d2a434e42b10ef30bbb590722e72ed104be669a (patch)
treefa26cf2785b2dc2a8e1a759964f3c5e5d48a9f7d /src/cpu
parentb247e02f6ecb6e8e95d0aa41b068efd3b2d7edbc (diff)
downloadgem5-3d2a434e42b10ef30bbb590722e72ed104be669a.tar.xz
Updates for other ISA cpu_builders.
--HG-- extra : convert_revision : b02736c627bb9dcf87463a9133e04369b9f8fae2
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/mips/cpu_builder.cc4
-rw-r--r--src/cpu/o3/mips/cpu_impl.hh14
-rw-r--r--src/cpu/o3/sparc/cpu_impl.hh14
3 files changed, 8 insertions, 24 deletions
diff --git a/src/cpu/o3/mips/cpu_builder.cc b/src/cpu/o3/mips/cpu_builder.cc
index 66741aee9..c6acc0bfb 100644
--- a/src/cpu/o3/mips/cpu_builder.cc
+++ b/src/cpu/o3/mips/cpu_builder.cc
@@ -51,6 +51,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(DerivO3CPU)
Param<int> clock;
Param<int> phase;
Param<int> numThreads;
+Param<int> cpu_id;
Param<int> activity;
SimObjectVectorParam<Process *> workload;
@@ -149,6 +150,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(DerivO3CPU)
INIT_PARAM(clock, "clock speed"),
INIT_PARAM_DFLT(phase, "clock phase", 0),
INIT_PARAM(numThreads, "number of HW thread contexts"),
+ INIT_PARAM(cpu_id, "processor ID"),
INIT_PARAM_DFLT(activity, "Initial activity count", 0),
INIT_PARAM(workload, "Processes to run"),
@@ -275,9 +277,11 @@ CREATE_SIM_OBJECT(DerivO3CPU)
MipsSimpleParams *params = new MipsSimpleParams;
params->clock = clock;
+ params->phase = phase;
params->name = getInstanceName();
params->numberOfThreads = actual_num_threads;
+ params->cpu_id = cpu_id;
params->activity = activity;
params->workload = workload;
diff --git a/src/cpu/o3/mips/cpu_impl.hh b/src/cpu/o3/mips/cpu_impl.hh
index 317fd748e..d1135f048 100644
--- a/src/cpu/o3/mips/cpu_impl.hh
+++ b/src/cpu/o3/mips/cpu_impl.hh
@@ -47,7 +47,7 @@
template <class Impl>
MipsO3CPU<Impl>::MipsO3CPU(Params *params)
- : FullO3CPU<Impl>(params)
+ : FullO3CPU<Impl>(this, params)
{
DPRINTF(O3CPU, "Creating MipsO3CPU object.\n");
@@ -95,6 +95,7 @@ MipsO3CPU<Impl>::MipsO3CPU(Params *params)
// Give the thread the TC.
this->thread[i]->tc = tc;
+ this->thread[i]->setCpuId(params->cpu_id);
// Add the TC to the CPU's list of TC's.
this->threadContexts.push_back(tc);
@@ -104,17 +105,6 @@ MipsO3CPU<Impl>::MipsO3CPU(Params *params)
this->thread[i]->setFuncExeInst(0);
}
- // Sets CPU pointers. These must be set at this level because the CPU
- // pointers are defined to be the highest level of CPU class.
- this->fetch.setCPU(this);
- this->decode.setCPU(this);
- this->rename.setCPU(this);
- this->iew.setCPU(this);
- this->commit.setCPU(this);
-
- this->rob.setCPU(this);
- this->regFile.setCPU(this);
-
lockAddr = 0;
lockFlag = false;
}
diff --git a/src/cpu/o3/sparc/cpu_impl.hh b/src/cpu/o3/sparc/cpu_impl.hh
index a425a8a56..50d980f55 100644
--- a/src/cpu/o3/sparc/cpu_impl.hh
+++ b/src/cpu/o3/sparc/cpu_impl.hh
@@ -55,7 +55,7 @@
#endif
template <class Impl>
-SparcO3CPU<Impl>::SparcO3CPU(Params *params) : FullO3CPU<Impl>(params)
+SparcO3CPU<Impl>::SparcO3CPU(Params *params) : FullO3CPU<Impl>(this, params)
{
DPRINTF(O3CPU, "Creating SparcO3CPU object.\n");
@@ -113,6 +113,7 @@ SparcO3CPU<Impl>::SparcO3CPU(Params *params) : FullO3CPU<Impl>(params)
#endif
// Give the thread the TC.
this->thread[i]->tc = tc;
+ this->thread[i]->setCpuId(params->cpu_id);
// Add the TC to the CPU's list of TC's.
this->threadContexts.push_back(tc);
@@ -122,17 +123,6 @@ SparcO3CPU<Impl>::SparcO3CPU(Params *params) : FullO3CPU<Impl>(params)
this->thread[i]->setFuncExeInst(0);
}
- // Sets CPU pointers. These must be set at this level because the CPU
- // pointers are defined to be the highest level of CPU class.
- this->fetch.setCPU(this);
- this->decode.setCPU(this);
- this->rename.setCPU(this);
- this->iew.setCPU(this);
- this->commit.setCPU(this);
-
- this->rob.setCPU(this);
- this->regFile.setCPU(this);
-
lockAddr = 0;
lockFlag = false;
}