O3: Make sure fetch doesn't go off into the weeds during speculation.

4 files changed, 19 insertions, 8 deletions

diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index b19e4f460..cd4a3e867 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -46,10 +46,10 @@
 #include "enums/MemoryMode.hh"
 #include "sim/core.hh"
 #include "sim/stat_control.hh"
+#include "sim/system.hh"
 
 #if FULL_SYSTEM
 #include "cpu/quiesce_event.hh"
-#include "sim/system.hh"
 #else
 #include "sim/process.hh"
 #endif
@@ -204,9 +204,7 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
                   params->activity),
 
       globalSeqNum(1),
-#if FULL_SYSTEM
       system(params->system),
-#endif // FULL_SYSTEM
       drainCount(0),
       deferRegistration(params->defer_registration)
 {
@@ -1105,9 +1103,7 @@ FullO3CPU<Impl>::resume()
     if (_status == SwitchedOut || _status == Idle)
         return;
 
-#if FULL_SYSTEM
     assert(system->getMemoryMode() == Enums::timing);
-#endif
 
     if (!tickEvent.scheduled())
         schedule(tickEvent, nextCycle());
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 7e9c33717..43a2b100d 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -652,10 +652,8 @@ class FullO3CPU : public BaseO3CPU
     Checker<DynInstPtr> *checker;
 #endif
 
-#if FULL_SYSTEM
     /** Pointer to the system. */
     System *system;
-#endif
 
     /** Event to call process() on once draining has completed. */
     Event *drainEvent;
diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh
index 92affc6db..90fe5334a 100644
--- a/src/cpu/o3/fetch.hh
+++ b/src/cpu/o3/fetch.hh
@@ -172,7 +172,8 @@ class DefaultFetch
         ItlbWait,
         IcacheWaitResponse,
         IcacheWaitRetry,
-        IcacheAccessComplete
+        IcacheAccessComplete,
+        NoGoodAddr
     };
 
     /** Fetching Policy, Add new policies here.*/
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 8b1797f11..118f132ca 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -633,6 +633,18 @@ DefaultFetch<Impl>::finishTranslation(Fault fault, RequestPtr mem_req)
 
     // If translation was successful, attempt to read the icache block.
     if (fault == NoFault) {
+        // Check that we're not going off into random memory
+        // If we have, just wait around for commit to squash something and put
+        // us on the right track
+        if (!cpu->system->isMemory(mem_req->getPaddr())) {
+            warn("Address %#x is outside of physical memory, stopping fetch\n",
+                    mem_req->getPaddr());
+            fetchStatus[tid] = NoGoodAddr;
+            delete mem_req;
+            memReq[tid] = NULL;
+            return;
+        }
+
         // Build packet here.
         PacketPtr data_pkt = new Packet(mem_req,
                                         MemCmd::ReadReq, Packet::Broadcast);
@@ -1162,9 +1174,13 @@ DefaultFetch<Impl>::fetch(bool &status_change)
         } else if (fetchStatus[tid] == TrapPending) {
             DPRINTF(Fetch, "[tid:%i]: Fetch is waiting for a pending trap\n",
                     tid);
+        } else if (fetchStatus[tid] == NoGoodAddr) {
+            DPRINTF(Fetch, "[tid:%i]: Fetch predicted non-executable address\n",
+                    tid);
         }
 
 
+
         // Status is Idle, Squashing, Blocked, ItlbWait or IcacheWaitResponse
         // so fetch should do nothing.
         return;