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author | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-12 18:40:08 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-12 18:40:08 -0500 |
commit | f72a9993931c7b986df771878e22cada0028955f (patch) | |
tree | 90d866e30806665010affd0ae134ebbad5c98d92 /src/cpu | |
parent | 49a9378718587bf120495aaf3087fcd2c6b87f9e (diff) | |
download | gem5-f72a9993931c7b986df771878e22cada0028955f.tar.xz |
some forgotten commits
--HG--
extra : convert_revision : 213440066c700ed5891a6d4568928b7f3f2fe750
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/checker/cpu.cc | 4 | ||||
-rw-r--r-- | src/cpu/ozone/lw_lsq_impl.hh | 6 | ||||
-rw-r--r-- | src/cpu/simple/atomic.cc | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc index d6cd9409b..a6af98d66 100644 --- a/src/cpu/checker/cpu.cc +++ b/src/cpu/checker/cpu.cc @@ -244,7 +244,7 @@ CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) !(unverifiedReq->isUncacheable()) && (!(unverifiedReq->isLocked()) || ((unverifiedReq->isLocked()) && - unverifiedReq->getScResult() == 1))) { + unverifiedReq->getExtraData() == 1))) { T inst_data; /* // This code would work if the LSQ allowed for snooping. @@ -269,7 +269,7 @@ CheckerCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) // doesn't check if the SC should succeed or fail, it just checks the // value. if (res && unverifiedReq->scResultValid()) - *res = unverifiedReq->getScResult(); + *res = unverifiedReq->getExtraData(); return NoFault; } diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh index ee1968626..f26b06453 100644 --- a/src/cpu/ozone/lw_lsq_impl.hh +++ b/src/cpu/ozone/lw_lsq_impl.hh @@ -605,12 +605,12 @@ OzoneLWLSQ<Impl>::writebackStores() // @todo: Remove this SC hack once the memory system handles it. if (req->isLocked()) { if (req->isUncacheable()) { - req->setScResult(2); + req->setExtraData(2); } else { if (cpu->lockFlag) { - req->setScResult(1); + req->setExtraData(1); } else { - req->setScResult(0); + req->setExtraData(0); // Hack: Instantly complete this store. completeDataAccess(data_pkt); --sq_it; diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index 072867536..3001241fe 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -422,7 +422,7 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) assert(res); *res = pkt->get<T>(); } else if (res) { - *res = req->getScResult(); + *res = req->getExtraData(); } } |