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author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-11 18:12:33 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-11 18:12:33 -0400 |
commit | 26c0426e443c34c1264ea437692a85a3f0967614 (patch) | |
tree | 28e32799d450e34ba0c6431613c26f0eafa3b7fb /src/cpu | |
parent | 78cf033dc0041fe7298765732b26c00a9732ccc5 (diff) | |
download | gem5-26c0426e443c34c1264ea437692a85a3f0967614.tar.xz |
Make sttw and sttwa use the twin memory operations.
--HG--
extra : convert_revision : 368d1c57a46fd5ca15461cb5ee8e05fd1e080daa
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/simple/atomic.cc | 11 | ||||
-rw-r--r-- | src/cpu/simple/timing.cc | 10 |
2 files changed, 21 insertions, 0 deletions
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc index ca4627bbf..6a14a8aa5 100644 --- a/src/cpu/simple/atomic.cc +++ b/src/cpu/simple/atomic.cc @@ -446,6 +446,17 @@ AtomicSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) #ifndef DOXYGEN_SHOULD_SKIP_THIS + +template +Fault +AtomicSimpleCPU::write(Twin32_t data, Addr addr, + unsigned flags, uint64_t *res); + +template +Fault +AtomicSimpleCPU::write(Twin64_t data, Addr addr, + unsigned flags, uint64_t *res); + template Fault AtomicSimpleCPU::write(uint64_t data, Addr addr, diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc index 2e602648a..45da7c3eb 100644 --- a/src/cpu/simple/timing.cc +++ b/src/cpu/simple/timing.cc @@ -398,6 +398,16 @@ TimingSimpleCPU::write(T data, Addr addr, unsigned flags, uint64_t *res) #ifndef DOXYGEN_SHOULD_SKIP_THIS template Fault +TimingSimpleCPU::write(Twin32_t data, Addr addr, + unsigned flags, uint64_t *res); + +template +Fault +TimingSimpleCPU::write(Twin64_t data, Addr addr, + unsigned flags, uint64_t *res); + +template +Fault TimingSimpleCPU::write(uint64_t data, Addr addr, unsigned flags, uint64_t *res); |