diff options
author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 09:59:13 +0100 |
---|---|---|
committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-08-07 09:59:13 +0100 |
commit | 53e777d6838ac3ca80e6557626f9e99fd93dd0f7 (patch) | |
tree | 9029d3e7f1e158beac24761f2c9c690b3918d734 /src/cpu | |
parent | 3e26756f1dfe1ddd1d7f5e458771c9bf79acb09a (diff) | |
download | gem5-53e777d6838ac3ca80e6557626f9e99fd93dd0f7.tar.xz |
base: Declare a type for context IDs
Context IDs used to be declared as ad hoc (usually as int). This
changeset introduces a typedef for ContextIDs and a constant for
invalid context IDs.
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/base_dyn_inst.hh | 2 | ||||
-rw-r--r-- | src/cpu/checker/thread_context.hh | 4 | ||||
-rw-r--r-- | src/cpu/minor/exec_context.hh | 2 | ||||
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 2 | ||||
-rw-r--r-- | src/cpu/thread_context.cc | 6 | ||||
-rw-r--r-- | src/cpu/thread_state.hh | 6 |
6 files changed, 11 insertions, 11 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index 5b54679c9..aae3af495 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -460,7 +460,7 @@ class BaseDynInst : public ExecContext, public RefCounted MasterID masterId() const { return cpu->dataMasterId(); } /** Read this context's system-wide ID **/ - int contextId() const { return thread->contextId(); } + ContextID contextId() const { return thread->contextId(); } /** Returns the fault type. */ Fault getFault() const { return fault; } diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh index 71c231ba0..5fcb82f6d 100644 --- a/src/cpu/checker/thread_context.hh +++ b/src/cpu/checker/thread_context.hh @@ -96,9 +96,9 @@ class CheckerThreadContext : public ThreadContext int cpuId() const { return actualTC->cpuId(); } - int contextId() const { return actualTC->contextId(); } + ContextID contextId() const { return actualTC->contextId(); } - void setContextId(int id) + void setContextId(ContextID id) { actualTC->setContextId(id); checkerTC->setContextId(id); diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh index 80d5d9872..3e4ea5ea9 100644 --- a/src/cpu/minor/exec_context.hh +++ b/src/cpu/minor/exec_context.hh @@ -254,7 +254,7 @@ class ExecContext : public ::ExecContext unsigned int readStCondFailures() const { return 0; } void setStCondFailures(unsigned int st_cond_failures) {} - int contextId() { return thread.contextId(); } + ContextID contextId() { return thread.contextId(); } /* ISA-specific (or at least currently ISA singleton) functions */ /* X86: TLB twiddling */ diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index 87d87900c..87b7d9198 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -101,7 +101,7 @@ class O3ThreadContext : public ThreadContext /** Reads this CPU's Socket ID. */ virtual uint32_t socketId() const { return cpu->socketId(); } - virtual int contextId() const { return thread->contextId(); } + virtual ContextID contextId() const { return thread->contextId(); } virtual void setContextId(int id) { thread->setContextId(id); } diff --git a/src/cpu/thread_context.cc b/src/cpu/thread_context.cc index fe1ae69dd..01ea51f26 100644 --- a/src/cpu/thread_context.cc +++ b/src/cpu/thread_context.cc @@ -95,9 +95,9 @@ ThreadContext::compare(ThreadContext *one, ThreadContext *two) if (id1 != id2) panic("CPU ids don't match, one: %d, two: %d", id1, id2); - id1 = one->contextId(); - id2 = two->contextId(); - if (id1 != id2) + const ContextID cid1 = one->contextId(); + const ContextID cid2 = two->contextId(); + if (cid1 != cid2) panic("Context ids don't match, one: %d, two: %d", id1, id2); diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh index 485c9306f..bd471e13a 100644 --- a/src/cpu/thread_state.hh +++ b/src/cpu/thread_state.hh @@ -71,9 +71,9 @@ struct ThreadState : public Serializable { uint32_t socketId() const { return baseCpu->socketId(); } - int contextId() const { return _contextId; } + ContextID contextId() const { return _contextId; } - void setContextId(int id) { _contextId = id; } + void setContextId(ContextID id) { _contextId = id; } void setThreadId(ThreadID id) { _threadId = id; } @@ -153,7 +153,7 @@ struct ThreadState : public Serializable { BaseCPU *baseCpu; // system wide HW context id - int _contextId; + ContextID _contextId; // Index of hardware thread context on the CPU that this represents. ThreadID _threadId; |