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authorRadhika Jagtap <radhika.jagtap@arm.com>2016-09-15 18:01:20 +0100
committerRadhika Jagtap <radhika.jagtap@arm.com>2016-09-15 18:01:20 +0100
commit1fe5f631376c391d5379e1e6dace8366a48ac1b2 (patch)
tree6456e1612a94018cc42d55122587e6b9ea6b8bab /src/cpu
parentd067327fc0c1a67ad2d456840e83db7b593b94a0 (diff)
downloadgem5-1fe5f631376c391d5379e1e6dace8366a48ac1b2.tar.xz
cpu: Support exit when any one Trace CPU completes replay
This change adds a Trace CPU param to exit simulation early, i.e. when the first (any one) trace execution is complete. With this change the user gets a choice to configure exit as either when the last CPU finishes (default) or first CPU finishes replay. Configuring an early exit enables simulating and measuring stats strictly when memory-system resources are being stressed by all Trace CPUs. Change-Id: I3998045fdcc5cd343e1ca92d18dd7f7ecdba8f1d Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/trace/TraceCPU.py5
-rw-r--r--src/cpu/trace/trace_cpu.cc27
-rw-r--r--src/cpu/trace/trace_cpu.hh6
3 files changed, 32 insertions, 6 deletions
diff --git a/src/cpu/trace/TraceCPU.py b/src/cpu/trace/TraceCPU.py
index bbce9c0ad..3ec5795e3 100644
--- a/src/cpu/trace/TraceCPU.py
+++ b/src/cpu/trace/TraceCPU.py
@@ -75,3 +75,8 @@ class TraceCPU(BaseCPU):
# frequency as was used for generating the traces.
freqMultiplier = Param.Float(1.0, "Multiplier scale the Trace CPU "\
"frequency up or down")
+
+ # Enable exiting when any one Trace CPU completes execution which is set to
+ # false by default
+ enableEarlyExit = Param.Bool(False, "Exit when any one Trace CPU "\
+ "completes execution")
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index ef0b252ed..44da7df1e 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -61,7 +61,8 @@ TraceCPU::TraceCPU(TraceCPUParams *params)
dcacheNextEvent(this),
oneTraceComplete(false),
traceOffset(0),
- execCompleteEvent(nullptr)
+ execCompleteEvent(nullptr),
+ enableEarlyExit(params->enableEarlyExit)
{
// Increment static counter for number of Trace CPUs.
++TraceCPU::numTraceCPUs;
@@ -137,10 +138,16 @@ TraceCPU::init()
// events using a relative tick delta
dcacheGen.adjustInitTraceOffset(traceOffset);
- // The static counter for number of Trace CPUs is correctly set at this
- // point so create an event and pass it.
- execCompleteEvent = new CountedExitEvent("end of all traces reached.",
- numTraceCPUs);
+ // If the Trace CPU simulation is configured to exit on any one trace
+ // completion then we don't need a counted event to count down all Trace
+ // CPUs in the system. If not then instantiate a counted event.
+ if (!enableEarlyExit) {
+ // The static counter for number of Trace CPUs is correctly set at
+ // this point so create an event and pass it.
+ execCompleteEvent = new CountedExitEvent("end of all traces reached.",
+ numTraceCPUs);
+ }
+
}
void
@@ -191,7 +198,15 @@ TraceCPU::checkAndSchedExitEvent()
// Schedule event to indicate execution is complete as both
// instruction and data access traces have been played back.
inform("%s: Execution complete.\n", name());
- schedule(*execCompleteEvent, curTick());
+ // If the replay is configured to exit early, that is when any one
+ // execution is complete then exit immediately and return. Otherwise,
+ // schedule the counted exit that counts down completion of each Trace
+ // CPU.
+ if (enableEarlyExit) {
+ exitSimLoop("End of trace reached");
+ } else {
+ schedule(*execCompleteEvent, curTick());
+ }
}
}
diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh
index 7da59de97..846a3e7c5 100644
--- a/src/cpu/trace/trace_cpu.hh
+++ b/src/cpu/trace/trace_cpu.hh
@@ -1116,6 +1116,12 @@ class TraceCPU : public BaseCPU
*/
CountedExitEvent *execCompleteEvent;
+ /**
+ * Exit when any one Trace CPU completes its execution. If this is
+ * configured true then the execCompleteEvent is not scheduled.
+ */
+ const bool enableEarlyExit;
+
Stats::Scalar numSchedDcacheEvent;
Stats::Scalar numSchedIcacheEvent;