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authorAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:26 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:26 -0500
commit5962fecc1d2eaf956f0aab10eee1e0666a461706 (patch)
treec6ec7d6de4d90399057b09e2287908223e15e970 /src/cpu
parent1114be4b78c0855d96004b9f71c61d4b6a050d3a (diff)
downloadgem5-5962fecc1d2eaf956f0aab10eee1e0666a461706.tar.xz
CPU: Remove references to memory copy operations
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/base_dyn_inst.hh7
-rw-r--r--src/cpu/inorder/inorder_dyn_inst.hh1
-rw-r--r--src/cpu/o3/commit_impl.hh3
-rw-r--r--src/cpu/ozone/lw_back_end_impl.hh3
-rw-r--r--src/cpu/static_inst.hh2
-rw-r--r--src/cpu/thread_state.hh12
6 files changed, 0 insertions, 28 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index a5357a7b0..4c7abe376 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -252,12 +252,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
/** The effective physical address. */
Addr physEffAddr;
- /** Effective virtual address for a copy source. */
- Addr copySrcEffAddr;
-
- /** Effective physical address for a copy source. */
- Addr copySrcPhysEffAddr;
-
/** The memory request flags (from translation). */
unsigned memReqFlags;
@@ -499,7 +493,6 @@ class BaseDynInst : public FastAlloc, public RefCounted
{ return staticInst->isStoreConditional(); }
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
- bool isCopy() const { return staticInst->isCopy(); }
bool isInteger() const { return staticInst->isInteger(); }
bool isFloating() const { return staticInst->isFloating(); }
bool isControl() const { return staticInst->isControl(); }
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index 04f9abb96..830244ae8 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -350,7 +350,6 @@ class InOrderDynInst : public FastAlloc, public RefCounted
{ return staticInst->isStoreConditional(); }
bool isInstPrefetch() const { return staticInst->isInstPrefetch(); }
bool isDataPrefetch() const { return staticInst->isDataPrefetch(); }
- bool isCopy() const { return staticInst->isCopy(); }
bool isInteger() const { return staticInst->isInteger(); }
bool isFloating() const { return staticInst->isFloating(); }
bool isControl() const { return staticInst->isControl(); }
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 8c651e203..e35c1bf29 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1199,9 +1199,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
head_inst->renamedDestRegIdx(i));
}
- if (head_inst->isCopy())
- panic("Should not commit any copy instructions!");
-
// Finally clear the head ROB entry.
rob->retireHead(tid);
diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index 8000c142e..880d0d183 100644
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -1205,9 +1205,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
inst->traceData = NULL;
}
- if (inst->isCopy())
- panic("Should not commit any copy instructions!");
-
inst->clearDependents();
frontEnd->addFreeRegs(freed_regs);
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index d07b322df..20483c499 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -117,7 +117,6 @@ class StaticInstBase : public RefCounted
IsIndexed, ///< Accesses memory with an indexed address computation
IsInstPrefetch, ///< Instruction-cache prefetch.
IsDataPrefetch, ///< Data-cache prefetch.
- IsCopy, ///< Fast Cache block copy
IsControl, ///< Control transfer instruction.
IsDirectControl, ///< PC relative control transfer.
@@ -228,7 +227,6 @@ class StaticInstBase : public RefCounted
bool isDataPrefetch() const { return flags[IsDataPrefetch]; }
bool isPrefetch() const { return isInstPrefetch() ||
isDataPrefetch(); }
- bool isCopy() const { return flags[IsCopy];}
bool isInteger() const { return flags[IsInteger]; }
bool isFloating() const { return flags[IsFloating]; }
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 06707894d..e0edc466e 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -200,18 +200,6 @@ struct ThreadState {
#endif
public:
- /**
- * Temporary storage to pass the source address from copy_load to
- * copy_store.
- * @todo Remove this temporary when we have a better way to do it.
- */
- Addr copySrcAddr;
- /**
- * Temp storage for the physical source address of a copy.
- * @todo Remove this temporary when we have a better way to do it.
- */
- Addr copySrcPhysAddr;
-
/*
* number of executed instructions, for matching with syscall trace
* points in EIO files.