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authorGabe Black <gblack@eecs.umich.edu>2010-09-14 00:29:38 -0700
committerGabe Black <gblack@eecs.umich.edu>2010-09-14 00:29:38 -0700
commit0dd1f7f01a8a744811aede5814111b8681271a6b (patch)
tree8d6f8936821696b19135495db72ffee29dac490e /src/cpu
parent8f3fbd2d13dbfc3699dc43b27b3c2a389049078d (diff)
downloadgem5-0dd1f7f01a8a744811aede5814111b8681271a6b.tar.xz
CPU: Trim unnecessary includes from some common files.
This reduces the scope of those includes and makes it less likely for there to be a dependency loop. This also moves the hashing functions associated with ExtMachInst objects to be with the ExtMachInst definitions and out of utility.hh.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/exetrace.cc1
-rw-r--r--src/cpu/exetrace.hh2
-rw-r--r--src/cpu/simple_thread.cc1
-rw-r--r--src/cpu/static_inst.hh3
-rw-r--r--src/cpu/thread_context.hh6
5 files changed, 8 insertions, 5 deletions
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 051ee57a0..4bab778ba 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -34,6 +34,7 @@
#include <iomanip>
#include "arch/isa_traits.hh"
+#include "arch/utility.hh"
#include "base/loader/symtab.hh"
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
diff --git a/src/cpu/exetrace.hh b/src/cpu/exetrace.hh
index aa0831dfd..1982595eb 100644
--- a/src/cpu/exetrace.hh
+++ b/src/cpu/exetrace.hh
@@ -35,12 +35,12 @@
#include "base/trace.hh"
#include "base/types.hh"
#include "cpu/static_inst.hh"
+#include "cpu/thread_context.hh"
#include "params/ExeTracer.hh"
#include "sim/insttracer.hh"
class ThreadContext;
-
namespace Trace {
class ExeTracerRecord : public InstRecord
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index 40f7f3cdb..bd796428a 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -34,6 +34,7 @@
#include <string>
#include "arch/isa_traits.hh"
+#include "arch/utility.hh"
#include "config/the_isa.hh"
#include "cpu/base.hh"
#include "cpu/simple_thread.hh"
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 0ae8653c5..6474bbf9c 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -35,9 +35,8 @@
#include <string>
#include "arch/isa_traits.hh"
-#include "arch/utility.hh"
+#include "arch/registers.hh"
#include "config/the_isa.hh"
-#include "base/bitfield.hh"
#include "base/hashmap.hh"
#include "base/misc.hh"
#include "base/refcnt.hh"
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 3d7be5256..753fa2146 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -31,12 +31,14 @@
#ifndef __CPU_THREAD_CONTEXT_HH__
#define __CPU_THREAD_CONTEXT_HH__
+#include <string>
+#include <iostream>
+
#include "arch/registers.hh"
#include "arch/types.hh"
#include "base/types.hh"
#include "config/full_system.hh"
#include "config/the_isa.hh"
-#include "sim/serialize.hh"
// @todo: Figure out a more architecture independent way to obtain the ITB and
// DTB pointers.
@@ -45,8 +47,8 @@ namespace TheISA
class TLB;
}
class BaseCPU;
+class Checkpoint;
class EndQuiesceEvent;
-class Event;
class TranslatingPort;
class FunctionalPort;
class VirtualPort;