diff options
author | Kevin Lim <ktlim@umich.edu> | 2006-07-05 13:22:46 -0400 |
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committer | Kevin Lim <ktlim@umich.edu> | 2006-07-05 13:22:46 -0400 |
commit | c33b5b3fc469e8f4885254122e60d781dcb11687 (patch) | |
tree | 4983720f62cd4fc1ee57690678228e5aca75d531 /src/cpu | |
parent | 77d0c0e28ac842e06e20a7861daf8a791680d797 (diff) | |
parent | 0fbecab797ffe7fc68e3a9af9fd0a21df37ec635 (diff) | |
download | gem5-c33b5b3fc469e8f4885254122e60d781dcb11687.tar.xz |
Merge ktlim@zamp:/z/ktlim2/clean/newmem-merge
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem
--HG--
extra : convert_revision : 20e45bec8c3911a6389a89e2d193aa1de867c89e
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/o3/alpha_cpu.hh | 4 | ||||
-rw-r--r-- | src/cpu/o3/alpha_cpu_impl.hh | 16 | ||||
-rw-r--r-- | src/cpu/o3/commit_impl.hh | 5 | ||||
-rw-r--r-- | src/cpu/o3/fetch.hh | 2 | ||||
-rw-r--r-- | src/cpu/o3/lsq_unit.hh | 2 |
5 files changed, 12 insertions, 17 deletions
diff --git a/src/cpu/o3/alpha_cpu.hh b/src/cpu/o3/alpha_cpu.hh index 55b975142..d7f3d5801 100644 --- a/src/cpu/o3/alpha_cpu.hh +++ b/src/cpu/o3/alpha_cpu.hh @@ -384,8 +384,6 @@ class AlphaO3CPU : public FullO3CPU<Impl> bool inPalMode(uint64_t PC) { return AlphaISA::PcPAL(PC); } - /** Traps to handle given fault. */ - void trap(Fault fault, unsigned tid); bool simPalCheck(int palFunc, unsigned tid); /** Processes any interrupts. */ @@ -395,6 +393,8 @@ class AlphaO3CPU : public FullO3CPU<Impl> void halt() { panic("Halt not implemented!\n"); } #endif + /** Traps to handle given fault. */ + void trap(Fault fault, unsigned tid); #if !FULL_SYSTEM /** Executes a syscall. diff --git a/src/cpu/o3/alpha_cpu_impl.hh b/src/cpu/o3/alpha_cpu_impl.hh index 532611fb6..eca6fbbcb 100644 --- a/src/cpu/o3/alpha_cpu_impl.hh +++ b/src/cpu/o3/alpha_cpu_impl.hh @@ -755,14 +755,6 @@ AlphaO3CPU<Impl>::simPalCheck(int palFunc, unsigned tid) template <class Impl> void -AlphaO3CPU<Impl>::trap(Fault fault, unsigned tid) -{ - // Pass the thread's TC into the invoke method. - fault->invoke(this->threadContexts[tid]); -} - -template <class Impl> -void AlphaO3CPU<Impl>::processInterrupts() { // Check for interrupts here. For now can copy the code that @@ -823,6 +815,14 @@ AlphaO3CPU<Impl>::processInterrupts() #endif // FULL_SYSTEM +template <class Impl> +void +AlphaO3CPU<Impl>::trap(Fault fault, unsigned tid) +{ + // Pass the thread's TC into the invoke method. + fault->invoke(this->threadContexts[tid]); +} + #if !FULL_SYSTEM template <class Impl> diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index 176f83246..cd7dd47d4 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -991,7 +991,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num) if (inst_fault != NoFault) { head_inst->setCompleted(); -#if FULL_SYSTEM DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n", head_inst->seqNum, head_inst->readPC()); @@ -1035,10 +1034,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num) generateTrapEvent(tid); return false; -#else // !FULL_SYSTEM - panic("fault (%d) detected @ PC %08p", inst_fault, - head_inst->PC); -#endif // FULL_SYSTEM } updateComInstStats(head_inst); diff --git a/src/cpu/o3/fetch.hh b/src/cpu/o3/fetch.hh index 790c28f09..7fcd21b7d 100644 --- a/src/cpu/o3/fetch.hh +++ b/src/cpu/o3/fetch.hh @@ -36,7 +36,7 @@ #include "base/statistics.hh" #include "base/timebuf.hh" #include "cpu/pc_event.hh" -#include "mem/packet.hh" +#include "mem/packet_impl.hh" #include "mem/port.hh" #include "sim/eventq.hh" diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index 9b67e61f2..74b8fe5bb 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -40,7 +40,7 @@ #include "config/full_system.hh" #include "base/hashmap.hh" #include "cpu/inst_seq.hh" -#include "mem/packet.hh" +#include "mem/packet_impl.hh" #include "mem/port.hh" /** |