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authorNilay Vaish <nilay@cs.wisc.edu>2015-07-04 10:43:46 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2015-07-04 10:43:46 -0500
commit11a48faeb49c0029a94d5e5aeb2a270a9e2971ec (patch)
tree176a07f94b1a65731d778b2a6fe91c8892b9b0b7 /src/cpu
parentd29d7c41f1e5db1460cebce7d29d5cc7b9902ce4 (diff)
downloadgem5-11a48faeb49c0029a94d5e5aeb2a270a9e2971ec.tar.xz
o3: correct the number of cc registers in rename map
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/rename_map.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc
index 25289825c..b0232df20 100644
--- a/src/cpu/o3/rename_map.cc
+++ b/src/cpu/o3/rename_map.cc
@@ -98,7 +98,7 @@ UnifiedRenameMap::init(PhysRegFile *_regFile,
floatMap.init(TheISA::NumFloatRegs, &(freeList->floatList), _floatZeroReg);
- ccMap.init(TheISA::NumFloatRegs, &(freeList->ccList), (RegIndex)-1);
+ ccMap.init(TheISA::NumCCRegs, &(freeList->ccList), (RegIndex)-1);
}