diff options
author | Korey Sewell <ksewell@umich.edu> | 2006-06-11 17:11:36 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2006-06-11 17:11:36 -0400 |
commit | 167fb86a694dbb49fe51cccbb4285bddcbf2cd44 (patch) | |
tree | f295515f7fe0e904ac71c4ef337dd89967990039 /src/cpu | |
parent | bb58e4b85163f263ebf5ea54fee5dba0109eb88c (diff) | |
parent | 6b5a8390c7812895b186c6712c98a0f3790aa169 (diff) | |
download | gem5-167fb86a694dbb49fe51cccbb4285bddcbf2cd44.tar.xz |
Merge zizzer:/bk/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-release
--HG--
extra : convert_revision : b73eeb1f73a5886a008919acd9e1971a79fd6bfb
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/simple/base.cc | 6 | ||||
-rw-r--r-- | src/cpu/static_inst.hh | 15 |
2 files changed, 11 insertions, 10 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc index c1ecf3967..b854dfab2 100644 --- a/src/cpu/simple/base.cc +++ b/src/cpu/simple/base.cc @@ -26,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * Authors: Steve Reinhardt + * Korey Sewell */ #include "arch/utility.hh" @@ -358,8 +359,13 @@ Fault BaseSimpleCPU::setupFetchRequest(Request *req) { // set up memory request for instruction fetch +#if THE_ISA == ALPHA_ISA + DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p",thread->readPC(), + thread->readNextPC()); +#else DPRINTF(Fetch,"Fetch: PC:%08p NPC:%08p NNPC:%08p\n",thread->readPC(), thread->readNextPC(),thread->readNextNPC()); +#endif req->setVirt(0, thread->readPC() & ~3, sizeof(MachInst), (FULL_SYSTEM && (thread->readPC() & 1)) ? PHYSICAL : 0, diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index bea52f510..a98078634 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -34,6 +34,7 @@ #include <bitset> #include <string> +#include "base/bitfield.hh" #include "base/hashmap.hh" #include "base/misc.hh" #include "base/refcnt.hh" @@ -411,16 +412,10 @@ class StaticInst : public StaticInstBase //This is defined as inline below. static StaticInstPtr decode(ExtMachInst mach_inst); - //MIPS Decoder Debug Functions - int getOpcode() { return (machInst & 0xFC000000) >> 26 ; }//31..26 - int getRs() { return (machInst & 0x03E00000) >> 21; } //25...21 - int getRt() { return (machInst & 0x001F0000) >> 16; } //20...16 - int getRd() { return (machInst & 0x0000F800) >> 11; } //15...11 - int getImm() { return (machInst & 0x0000FFFF); } //15...0 - int getFunction(){ return (machInst & 0x0000003F); }//5...0 - int getBranch(){ return (machInst & 0x0000FFFF); }//15...0 - int getJump(){ return (machInst & 0x03FFFFFF); }//5...0 - int getHint(){ return (machInst & 0x000007C0) >> 6; } //10...6 + /// Return opcode of machine instruction + uint32_t getOpcode() { return bits(machInst, 31, 26);} + + /// Return name of machine instruction std::string getName() { return mnemonic; } }; |