AtomicSimpleCPU with a cache now runs the hello world! test program.

Need to clean up a bunch of flags/hacks in the code.  Then onto Timming mode.

Functional accesses also work properly, although not exactly how we wanted them.  I'll need to clean that up as well.

src/cpu/simple/atomic.cc:
    Atomic CPU needs to set thread context so stats work in cache.  Temporarily just use CPU=0 ThreadID=0
src/mem/cache/cache_impl.hh:
    Need to return success/failure properly still
    Physical memory object doesn't assert SATISFIED anymore, need to remove that flag
src/mem/cache/tags/lru.cc:
    Doesn't work if the REQ doesn't set it's ASID.  Temporary fix use 0 always

--HG--
extra : convert_revision : d06a39684af593db699b64df9a29f80c61d8d050

1 files changed, 3 insertions, 0 deletions

diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index be6f421b3..b7202cbbb 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -124,15 +124,18 @@ AtomicSimpleCPU::AtomicSimpleCPU(Params *p)
 
     // @todo fix me and get the real cpu id & thread number!!!
     ifetch_req = new Request();
+    ifetch_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
     ifetch_pkt = new Packet(ifetch_req, Packet::ReadReq, Packet::Broadcast);
     ifetch_pkt->dataStatic(&inst);
 
     data_read_req = new Request();
+    data_read_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
     data_read_pkt = new Packet(data_read_req, Packet::ReadReq,
                                Packet::Broadcast);
     data_read_pkt->dataStatic(&dataReg);
 
     data_write_req = new Request();
+    data_write_req->setThreadContext(0,0); //Need CPU/Thread IDS HERE
     data_write_pkt = new Packet(data_write_req, Packet::WriteReq,
                                 Packet::Broadcast);
 }