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authorGabe Black <gblack@eecs.umich.edu>2006-08-11 19:43:10 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-08-11 19:43:10 -0400
commit800e6ecc07d01c49808cc4f9597d94cc8cfd9fae (patch)
treebdc05bad76c4a757533cccb5002dadc15eca0456 /src/cpu
parentf612f09669310359d6a194645b00e32a3921283b (diff)
downloadgem5-800e6ecc07d01c49808cc4f9597d94cc8cfd9fae.tar.xz
Pushed most of constants.hh back into isa_traits.hh and regfile.hh and created a seperate file for the syscallreturn class.
--HG-- extra : convert_revision : 9507ea1c09fda959f00aec9ec8ffb887ec8dd0f9
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/checker/thread_context.hh5
-rw-r--r--src/cpu/o3/alpha/thread_context.hh5
-rw-r--r--src/cpu/o3/mips/thread_context.hh5
-rw-r--r--src/cpu/simple_thread.hh4
-rw-r--r--src/cpu/static_inst.hh3
-rw-r--r--src/cpu/thread_context.hh11
6 files changed, 20 insertions, 13 deletions
diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index c035e92ac..8c0186dae 100644
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -31,6 +31,7 @@
#ifndef __CPU_CHECKER_THREAD_CONTEXT_HH__
#define __CPU_CHECKER_THREAD_CONTEXT_HH__
+#include "arch/types.hh"
#include "cpu/checker/cpu.hh"
#include "cpu/simple_thread.hh"
#include "cpu/thread_context.hh"
@@ -295,8 +296,8 @@ class CheckerThreadContext : public ThreadContext
Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
#endif
- void changeRegFileContext(RegFile::ContextParam param,
- RegFile::ContextVal val)
+ void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val)
{
actualTC->changeRegFileContext(param, val);
checkerTC->changeRegFileContext(param, val);
diff --git a/src/cpu/o3/alpha/thread_context.hh b/src/cpu/o3/alpha/thread_context.hh
index 773f08ecc..70a09940f 100644
--- a/src/cpu/o3/alpha/thread_context.hh
+++ b/src/cpu/o3/alpha/thread_context.hh
@@ -28,6 +28,7 @@
* Authors: Kevin Lim
*/
+#include "arch/alpha/types.hh"
#include "cpu/o3/thread_context.hh"
template <class Impl>
@@ -64,8 +65,8 @@ class AlphaTC : public O3ThreadContext<Impl>
panic("Alpha has no NextNPC!");
}
- virtual void changeRegFileContext(TheISA::RegFile::ContextParam param,
- TheISA::RegFile::ContextVal val)
+ virtual void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val)
{ panic("Not supported on Alpha!"); }
diff --git a/src/cpu/o3/mips/thread_context.hh b/src/cpu/o3/mips/thread_context.hh
index 5b03426f1..26b1e2e7f 100644
--- a/src/cpu/o3/mips/thread_context.hh
+++ b/src/cpu/o3/mips/thread_context.hh
@@ -29,6 +29,7 @@
* Korey Sewell
*/
+#include "arch/mips/types.hh"
#include "cpu/o3/thread_context.hh"
template <class Impl>
@@ -45,8 +46,8 @@ class MipsTC : public O3ThreadContext<Impl>
this->cpu->setNextNPC(val, this->thread->readTid());
}
- virtual void changeRegFileContext(TheISA::RegFile::ContextParam param,
- TheISA::RegFile::ContextVal val)
+ virtual void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val)
{ panic("Not supported on Mips!"); }
/** This function exits the thread context in the CPU and returns
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index d36853db4..242cfd0e1 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -449,8 +449,8 @@ class SimpleThread : public ThreadState
}
#endif
- void changeRegFileContext(RegFile::ContextParam param,
- RegFile::ContextVal val)
+ void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val)
{
regs.changeContext(param, val);
}
diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh
index 0d356bb4c..4322e8092 100644
--- a/src/cpu/static_inst.hh
+++ b/src/cpu/static_inst.hh
@@ -34,6 +34,8 @@
#include <bitset>
#include <string>
+#include "arch/isa_traits.hh"
+#include "arch/faults.hh"
#include "base/bitfield.hh"
#include "base/hashmap.hh"
#include "base/misc.hh"
@@ -41,7 +43,6 @@
#include "cpu/op_class.hh"
#include "cpu/o3/dyn_inst.hh"
#include "sim/host.hh"
-#include "arch/isa_traits.hh"
// forward declarations
struct AlphaSimpleImpl;
diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index e019e22bc..73046097d 100644
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -31,6 +31,9 @@
#ifndef __CPU_THREAD_CONTEXT_HH__
#define __CPU_THREAD_CONTEXT_HH__
+#include "arch/types.hh"
+#include "arch/regfile.hh"
+#include "arch/syscallreturn.hh"
#include "config/full_system.hh"
#include "mem/request.hh"
#include "sim/faults.hh"
@@ -254,8 +257,8 @@ class ThreadContext
virtual int exit() { return 1; };
#endif
- virtual void changeRegFileContext(RegFile::ContextParam param,
- RegFile::ContextVal val) = 0;
+ virtual void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val) = 0;
};
/**
@@ -438,8 +441,8 @@ class ProxyThreadContext : public ThreadContext
Counter readFuncExeInst() { return actualTC->readFuncExeInst(); }
#endif
- void changeRegFileContext(RegFile::ContextParam param,
- RegFile::ContextVal val)
+ void changeRegFileContext(TheISA::RegContextParam param,
+ TheISA::RegContextVal val)
{
actualTC->changeRegFileContext(param, val);
}