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| author | Mrinmoy Ghosh <Mrinmoy.Ghosh@arm.com> | 2011-08-19 15:08:05 -0500 |
|---|---|---|
| committer | Mrinmoy Ghosh <Mrinmoy.Ghosh@arm.com> | 2011-08-19 15:08:05 -0500 |
| commit | d0e04859023702ec23c97683700c638949a1dad1 (patch) | |
| tree | 9ed3e8ea4957235d615dd4f0050a94f23e92a889 /src/cpu | |
| parent | 0db95030fc75792de8231bad7e66a09561eaa2ec (diff) | |
| download | gem5-d0e04859023702ec23c97683700c638949a1dad1.tar.xz | |
LSQ: Add some better dprintfs for storeset predictor.
Diffstat (limited to 'src/cpu')
| -rw-r--r-- | src/cpu/o3/commit_impl.hh | 4 | ||||
| -rw-r--r-- | src/cpu/o3/mem_dep_unit.hh | 4 | ||||
| -rw-r--r-- | src/cpu/o3/mem_dep_unit_impl.hh | 3 |
3 files changed, 6 insertions, 5 deletions
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh index c0946c16f..0d9952df4 100644 --- a/src/cpu/o3/commit_impl.hh +++ b/src/cpu/o3/commit_impl.hh @@ -1189,8 +1189,8 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num) } } #endif - DPRINTF(Commit, "Committing instruction with [sn:%lli]\n", - head_inst->seqNum); + DPRINTF(Commit, "Committing instruction with [sn:%lli] PC %s\n", + head_inst->seqNum, head_inst->pcState()); if (head_inst->traceData) { head_inst->traceData->setFetchSeq(head_inst->seqNum); head_inst->traceData->setCPSeq(thread[tid]->numInst); diff --git a/src/cpu/o3/mem_dep_unit.hh b/src/cpu/o3/mem_dep_unit.hh index 5d6f0a159..7d00369d3 100644 --- a/src/cpu/o3/mem_dep_unit.hh +++ b/src/cpu/o3/mem_dep_unit.hh @@ -169,7 +169,7 @@ class MemDepUnit ++memdep_count; DPRINTF(MemDepUnit, "Memory dependency entry created. " - "memdep_count=%i\n", memdep_count); + "memdep_count=%i %s\n", memdep_count, inst->pcState()); #endif } @@ -183,7 +183,7 @@ class MemDepUnit --memdep_count; DPRINTF(MemDepUnit, "Memory dependency entry deleted. " - "memdep_count=%i\n", memdep_count); + "memdep_count=%i %s\n", memdep_count, inst->pcState()); #endif } diff --git a/src/cpu/o3/mem_dep_unit_impl.hh b/src/cpu/o3/mem_dep_unit_impl.hh index bb4264a92..0208a622e 100644 --- a/src/cpu/o3/mem_dep_unit_impl.hh +++ b/src/cpu/o3/mem_dep_unit_impl.hh @@ -285,7 +285,8 @@ MemDepUnit<MemDepPred, Impl>::insertBarrier(DynInstPtr &barr_inst) loadBarrierSN = barr_sn; storeBarrier = true; storeBarrierSN = barr_sn; - DPRINTF(MemDepUnit, "Inserted a memory barrier\n"); + DPRINTF(MemDepUnit, "Inserted a memory barrier %s SN:%lli\n", + barr_inst->pcState(),barr_sn); } else if (barr_inst->isWriteBarrier()) { storeBarrier = true; storeBarrierSN = barr_sn; |