Decoder: Remove the thread context get/set from the decoder.

This interface is no longer used, and getting rid of it simplifies the
decoders and code that sets up the decoders. The thread context had been used
to read architectural state which was used to contextualize the instruction
memory as it came in. That was changed so that the state is now sent to the
decoders to keep locally if/when it changes. That's significantly more
efficient.

Committed by: Nilay Vaish <nilay@cs.wisc.edu>

6 files changed, 7 insertions, 13 deletions

diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 40f1cef6a..5637eb08b 100644
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -306,7 +306,6 @@ Checker<Impl>::verify(DynInstPtr &completed_inst)
                     StaticInstPtr instPtr = NULL;
 
                     //Predecode, ie bundle up an ExtMachInst
-                    thread->decoder.setTC(thread->getTC());
                     //If more fetch data is needed, pass it in.
                     Addr fetchPC = (pcState.instAddr() & PCMask) + fetchOffset;
                     thread->decoder.moreBytes(pcState, fetchPC, machInst);
diff --git a/src/cpu/inorder/resources/fetch_unit.cc b/src/cpu/inorder/resources/fetch_unit.cc
index 0ed59fe2d..49bd0434b 100644
--- a/src/cpu/inorder/resources/fetch_unit.cc
+++ b/src/cpu/inorder/resources/fetch_unit.cc
@@ -59,7 +59,7 @@ FetchUnit::FetchUnit(string res_name, int res_id, int res_width,
       instSize(sizeof(TheISA::MachInst)), fetchBuffSize(params->fetchBuffSize)
 {
     for (int tid = 0; tid < MaxThreads; tid++)
-        decoder[tid] = new Decoder(NULL);
+        decoder[tid] = new Decoder;
 }
 
 FetchUnit::~FetchUnit()
@@ -109,7 +109,6 @@ FetchUnit::createMachInst(std::list<FetchBlock*>::iterator fetch_it,
     MachInst mach_inst =
         TheISA::gtoh(fetchInsts[fetch_offset]);
 
-    decoder[tid]->setTC(cpu->thread[tid]->getTC());
     decoder[tid]->moreBytes(instPC, inst->instAddr(), mach_inst);
     assert(decoder[tid]->instReady());
     inst->setStaticInst(decoder[tid]->decode(instPC));
diff --git a/src/cpu/legiontrace.cc b/src/cpu/legiontrace.cc
index f3ac5e702..b94b8f5fe 100644
--- a/src/cpu/legiontrace.cc
+++ b/src/cpu/legiontrace.cc
@@ -422,7 +422,6 @@ Trace::LegionTraceRecord::dump()
                          << endl;
 
                     TheISA::Decoder *decoder = thread->getDecoderPtr();
-                    decoder->setTC(thread);
                     decoder->moreBytes(m5Pc, m5Pc, shared_data->instruction);
 
                     assert(decoder->instReady());
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 33563f539..9efe30309 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -134,7 +134,7 @@ DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params)
 
     for (int i = 0; i < Impl::MaxThreads; i++) {
         cacheData[i] = NULL;
-        decoder[i] = new TheISA::Decoder(NULL);
+        decoder[i] = new TheISA::Decoder;
     }
 }
 
@@ -1225,9 +1225,8 @@ DefaultFetch<Impl>::fetch(bool &status_change)
                 if (blkOffset >= numInsts)
                     break;
             }
-            MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
 
-            decoder[tid]->setTC(cpu->thread[tid]->getTC());
+            MachInst inst = TheISA::gtoh(cacheInsts[blkOffset]);
             decoder[tid]->moreBytes(thisPC, fetchAddr, inst);
 
             if (decoder[tid]->needMoreBytes()) {
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 5a9499333..9ca943900 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -380,8 +380,6 @@ BaseSimpleCPU::preExecute()
         TheISA::Decoder *decoder = &(thread->decoder);
 
         //Predecode, ie bundle up an ExtMachInst
-        //This should go away once the constructor can be set up properly
-        decoder->setTC(thread->getTC());
         //If more fetch data is needed, pass it in.
         Addr fetchPC = (pcState.instAddr() & PCMask) + fetchOffset;
         //if(decoder->needMoreBytes())
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index f887e7e48..cf9bb4840 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -63,16 +63,16 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
                            Process *_process, TheISA::TLB *_itb,
                            TheISA::TLB *_dtb)
     : ThreadState(_cpu, _thread_num, _process), system(_sys), itb(_itb),
-      dtb(_dtb), decoder(NULL)
+      dtb(_dtb)
 {
     clearArchRegs();
     tc = new ProxyThreadContext<SimpleThread>(this);
 }
+
 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
                            TheISA::TLB *_itb, TheISA::TLB *_dtb,
                            bool use_kernel_stats)
-    : ThreadState(_cpu, _thread_num, NULL), system(_sys), itb(_itb), dtb(_dtb),
-      decoder(NULL)
+    : ThreadState(_cpu, _thread_num, NULL), system(_sys), itb(_itb), dtb(_dtb)
 {
     tc = new ProxyThreadContext<SimpleThread>(this);
 
@@ -99,7 +99,7 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
 }
 
 SimpleThread::SimpleThread()
-    : ThreadState(NULL, -1, NULL), decoder(NULL)
+    : ThreadState(NULL, -1, NULL)
 {
     tc = new ProxyThreadContext<SimpleThread>(this);
 }