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authorKevin Lim <ktlim@umich.edu>2006-07-07 15:38:15 -0400
committerKevin Lim <ktlim@umich.edu>2006-07-07 15:38:15 -0400
commit018ba50f2c05e07c7bd1c951db8ba33402c323dc (patch)
treedf754aff776ffe6cb9ac6347bd463e4c5b253541 /src/cpu
parent55e59e26c1a7acd8715262999451c451fc50b480 (diff)
downloadgem5-018ba50f2c05e07c7bd1c951db8ba33402c323dc.tar.xz
Switch out fixes for CPUs.
src/cpu/o3/cpu.cc: Fix up keeping proper state when switched out and drained. src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: Keep track of the event we use to schedule fetch initially and upon resume. We may have to cancel the event if the CPU is switched out. --HG-- extra : convert_revision : 60a2a1bd2cdc67bd53ca4a67aa77166c826a4c8c
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/cpu.cc4
-rw-r--r--src/cpu/simple/timing.cc24
-rw-r--r--src/cpu/simple/timing.hh2
3 files changed, 23 insertions, 7 deletions
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index f345fe82d..ceba74ef3 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -400,7 +400,8 @@ FullO3CPU<Impl>::tick()
}
if (!tickEvent.scheduled()) {
- if (_status == SwitchedOut) {
+ if (_status == SwitchedOut ||
+ getState() == SimObject::DrainedTiming) {
// increment stat
lastRunningCycle = curTick;
} else if (!activityRec.active()) {
@@ -793,6 +794,7 @@ FullO3CPU<Impl>::resume()
if (!tickEvent.scheduled())
tickEvent.schedule(curTick);
_status = Running;
+ changeState(SimObject::Timing);
}
template <class Impl>
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 6774d79a9..eb5895949 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -89,6 +89,7 @@ TimingSimpleCPU::TimingSimpleCPU(Params *p)
_status = Idle;
ifetch_pkt = dcache_pkt = NULL;
drainEvent = NULL;
+ fetchEvent = NULL;
state = SimObject::Timing;
}
@@ -130,9 +131,15 @@ void
TimingSimpleCPU::resume()
{
if (_status != SwitchedOut && _status != Idle) {
- Event *e =
- new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, true);
- e->schedule(curTick);
+ // Delete the old event if it existed.
+ if (fetchEvent) {
+ assert(!fetchEvent->scheduled());
+ delete fetchEvent;
+ }
+
+ fetchEvent =
+ new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false);
+ fetchEvent->schedule(curTick);
}
}
@@ -147,6 +154,11 @@ TimingSimpleCPU::switchOut()
{
assert(status() == Running || status() == Idle);
_status = SwitchedOut;
+
+ // If we've been scheduled to resume but are then told to switch out,
+ // we'll need to cancel it.
+ if (fetchEvent && fetchEvent->scheduled())
+ fetchEvent->deschedule();
}
@@ -178,9 +190,9 @@ TimingSimpleCPU::activateContext(int thread_num, int delay)
notIdleFraction++;
_status = Running;
// kick things off by initiating the fetch of the next instruction
- Event *e =
- new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, true);
- e->schedule(curTick + cycles(delay));
+ fetchEvent =
+ new EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch>(this, false);
+ fetchEvent->schedule(curTick + cycles(delay));
}
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index c360e553e..f9bc0f352 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -66,6 +66,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
Event *drainEvent;
+ Event *fetchEvent;
+
private:
class CpuPort : public Port