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author | Nilay Vaish <nilay@cs.wisc.edu> | 2011-11-03 22:52:21 -0500 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2011-11-03 22:52:21 -0500 |
commit | 582ea4d5431f9fa9edbeb16835b04171647ea18b (patch) | |
tree | a9a3ae50ff09f7791525cf8313d8afec67f9f3e3 /src/cpu | |
parent | fb5c095cd53f4f16e139d9e959c41e089ff79896 (diff) | |
download | gem5-582ea4d5431f9fa9edbeb16835b04171647ea18b.tar.xz |
x86: Add microop for fence
This patch adds a new microop for memory barrier. The microop itself does
nothing, but since it is marked as a memory barrier, the O3 CPU should flush
all the pending loads and stores before the fence to the memory system.
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions