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authorGabe Black <gblack@eecs.umich.edu>2006-10-16 15:56:46 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-16 15:56:46 -0400
commitf1661baf30faf76dbad7d23aeac0c3dbe4dd045c (patch)
treeb919be9489bab4d1810302c5595b8ae2b8965104 /src/cpu
parent7fefa2a62111e6dd91d954e3d181244323333892 (diff)
downloadgem5-f1661baf30faf76dbad7d23aeac0c3dbe4dd045c.tar.xz
Fix up microcode support.
src/arch/sparc/isa/formats/blockmem.isa: Several small and medium bug fixes. src/cpu/simple/base.cc: Fixed a few compiler errors and made sure the next micro pc is set to 1 to prevent the first microop from executing twice. Also fixed a fetching bug. src/cpu/thread_state.cc: Made sure the microPC and nextMicroPC are initialized properly. --HG-- extra : convert_revision : a0fc8aa18d1ade916f17c557181a793c6108a8af
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/simple/base.cc12
-rw-r--r--src/cpu/thread_state.cc4
2 files changed, 9 insertions, 7 deletions
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 1d5c0a6f5..769e400df 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -402,10 +402,12 @@ BaseSimpleCPU::preExecute()
if (instPtr->isMacroOp()) {
curMacroStaticInst = instPtr;
curStaticInst = curMacroStaticInst->fetchMicroOp(0);
+ } else {
+ curStaticInst = instPtr;
}
} else {
//Read the next micro op from the macro op
- curStaticInst = curMacroStaticInst->fetchMicroOp(thread->readMicroPc());
+ curStaticInst = curMacroStaticInst->fetchMicroOp(thread->readMicroPC());
}
@@ -464,17 +466,17 @@ BaseSimpleCPU::advancePC(Fault fault)
assert(curMacroStaticInst);
//Close out this macro op, and clean up the
//microcode state
- curMacroStaticInst = nullStaticInst;
+ curMacroStaticInst = StaticInst::nullStaticInstPtr;
thread->setMicroPC(0);
- thread->setNextMicroPC(0);
+ thread->setNextMicroPC(1);
}
//If we're still in a macro op
if (curMacroStaticInst) {
//Advance the micro pc
- thread->setMicroPC(thread->getNextMicroPC());
+ thread->setMicroPC(thread->readNextMicroPC());
//Advance the "next" micro pc. Note that there are no delay
//slots, and micro ops are "word" addressed.
- thread->setNextMicroPC(thread->getNextMicroPC() + 1);
+ thread->setNextMicroPC(thread->readNextMicroPC() + 1);
} else {
// go to the next instruction
thread->setPC(thread->readNextPC());
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index 6a96560f1..c644ae8d7 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -42,13 +42,13 @@
ThreadState::ThreadState(int _cpuId, int _tid)
: cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
- funcExeInst(0), storeCondFailures(0)
+ microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
#else
ThreadState::ThreadState(int _cpuId, int _tid, Process *_process,
short _asid, MemObject *mem)
: cpuId(_cpuId), tid(_tid), lastActivate(0), lastSuspend(0),
process(_process), asid(_asid),
- funcExeInst(0), storeCondFailures(0)
+ microPC(0), nextMicroPC(1), funcExeInst(0), storeCondFailures(0)
#endif
{
numInst = 0;