Make the Event::description() a const function

--HG--
extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0

35 files changed, 46 insertions, 46 deletions

diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 677152ce8..23195f720 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -88,7 +88,7 @@ CPUProgressEvent::process()
 }
 
 const char *
-CPUProgressEvent::description()
+CPUProgressEvent::description() const
 {
     return "CPU Progress";
 }
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index e0d2340e9..bdc7d7c8b 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -68,7 +68,7 @@ class CPUProgressEvent : public Event
 
     void process();
 
-    virtual const char *description();
+    virtual const char *description() const;
 };
 
 class BaseCPU : public MemObject
diff --git a/src/cpu/memtest/memtest.hh b/src/cpu/memtest/memtest.hh
index 1a330319f..ac2d0a058 100644
--- a/src/cpu/memtest/memtest.hh
+++ b/src/cpu/memtest/memtest.hh
@@ -77,7 +77,7 @@ class MemTest : public MemObject
         TickEvent(MemTest *c)
             : Event(&mainEventQueue, CPU_Tick_Pri), cpu(c) {}
         void process() {cpu->tick();}
-        virtual const char *description() { return "MemTest tick"; }
+        virtual const char *description() const { return "MemTest tick"; }
     };
 
     TickEvent tickEvent;
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 27bdd20c5..80e42fa8b 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -97,7 +97,7 @@ class DefaultCommit
         TrapEvent(DefaultCommit<Impl> *_commit, unsigned _tid);
 
         void process();
-        const char *description();
+        const char *description() const;
     };
 
     /** Overall commit status. Used to determine if the CPU can deschedule
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 89df257e9..ee0f2bb59 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -65,7 +65,7 @@ DefaultCommit<Impl>::TrapEvent::process()
 
 template <class Impl>
 const char *
-DefaultCommit<Impl>::TrapEvent::description()
+DefaultCommit<Impl>::TrapEvent::description() const
 {
     return "Trap";
 }
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 5908062aa..8eb17d23b 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -80,7 +80,7 @@ FullO3CPU<Impl>::TickEvent::process()
 
 template <class Impl>
 const char *
-FullO3CPU<Impl>::TickEvent::description()
+FullO3CPU<Impl>::TickEvent::description() const
 {
     return "FullO3CPU tick";
 }
@@ -109,7 +109,7 @@ FullO3CPU<Impl>::ActivateThreadEvent::process()
 
 template <class Impl>
 const char *
-FullO3CPU<Impl>::ActivateThreadEvent::description()
+FullO3CPU<Impl>::ActivateThreadEvent::description() const
 {
     return "FullO3CPU \"Activate Thread\"";
 }
@@ -141,7 +141,7 @@ FullO3CPU<Impl>::DeallocateContextEvent::process()
 
 template <class Impl>
 const char *
-FullO3CPU<Impl>::DeallocateContextEvent::description()
+FullO3CPU<Impl>::DeallocateContextEvent::description() const
 {
     return "FullO3CPU \"Deallocate Context\"";
 }
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 162e377e1..e902968c1 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -136,7 +136,7 @@ class FullO3CPU : public BaseO3CPU
         /** Processes a tick event, calling tick() on the CPU. */
         void process();
         /** Returns the description of the tick event. */
-        const char *description();
+        const char *description() const;
     };
 
     /** The tick event used for scheduling CPU ticks. */
@@ -178,7 +178,7 @@ class FullO3CPU : public BaseO3CPU
         void process();
 
         /** Returns the description of the event. */
-        const char *description();
+        const char *description() const;
     };
 
     /** Schedule thread to activate , regardless of its current state. */
@@ -229,7 +229,7 @@ class FullO3CPU : public BaseO3CPU
         void setRemove(bool _remove) { remove = _remove; }
 
         /** Returns the description of the event. */
-        const char *description();
+        const char *description() const;
     };
 
     /** Schedule cpu to deallocate thread context.*/
diff --git a/src/cpu/o3/inst_queue.hh b/src/cpu/o3/inst_queue.hh
index 9d7c457ca..d0f503977 100644
--- a/src/cpu/o3/inst_queue.hh
+++ b/src/cpu/o3/inst_queue.hh
@@ -105,7 +105,7 @@ class InstructionQueue
                      InstructionQueue<Impl> *iq_ptr);
 
         virtual void process();
-        virtual const char *description();
+        virtual const char *description() const;
         void setFreeFU() { freeFU = true; }
     };
 
diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index b14a63a17..fb06f20df 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -58,7 +58,7 @@ InstructionQueue<Impl>::FUCompletion::process()
 
 template <class Impl>
 const char *
-InstructionQueue<Impl>::FUCompletion::description()
+InstructionQueue<Impl>::FUCompletion::description() const
 {
     return "Functional unit completion";
 }
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh
index be9224099..128a71dbc 100644
--- a/src/cpu/o3/lsq_unit.hh
+++ b/src/cpu/o3/lsq_unit.hh
@@ -273,7 +273,7 @@ class LSQUnit {
         void process();
 
         /** Returns the description of this event. */
-        const char *description();
+        const char *description() const;
 
       private:
         /** Instruction whose results are being written back. */
diff --git a/src/cpu/o3/lsq_unit_impl.hh b/src/cpu/o3/lsq_unit_impl.hh
index 71b416c9c..e6ff5e931 100644
--- a/src/cpu/o3/lsq_unit_impl.hh
+++ b/src/cpu/o3/lsq_unit_impl.hh
@@ -67,7 +67,7 @@ LSQUnit<Impl>::WritebackEvent::process()
 
 template<class Impl>
 const char *
-LSQUnit<Impl>::WritebackEvent::description()
+LSQUnit<Impl>::WritebackEvent::description() const
 {
     return "Store writeback";
 }
diff --git a/src/cpu/ozone/back_end.hh b/src/cpu/ozone/back_end.hh
index 992f55c6e..4cdc86c3c 100644
--- a/src/cpu/ozone/back_end.hh
+++ b/src/cpu/ozone/back_end.hh
@@ -186,7 +186,7 @@ class BackEnd
         /** Processes writeback event. */
         virtual void process();
         /** Returns the description of the writeback event. */
-        virtual const char *description();
+        virtual const char *description() const;
     };
 
     BackEnd(Params *params);
@@ -309,7 +309,7 @@ class BackEnd
         DCacheCompletionEvent(BackEnd *_be);
 
         virtual void process();
-        virtual const char *description();
+        virtual const char *description() const;
     };
 
     friend class DCacheCompletionEvent;
diff --git a/src/cpu/ozone/back_end_impl.hh b/src/cpu/ozone/back_end_impl.hh
index 27146ecf0..415407c52 100644
--- a/src/cpu/ozone/back_end_impl.hh
+++ b/src/cpu/ozone/back_end_impl.hh
@@ -581,7 +581,7 @@ BackEnd<Impl>::LdWritebackEvent::process()
 
 template<class Impl>
 const char *
-BackEnd<Impl>::LdWritebackEvent::description()
+BackEnd<Impl>::LdWritebackEvent::description() const
 {
     return "Load writeback";
 }
@@ -601,7 +601,7 @@ BackEnd<Impl>::DCacheCompletionEvent::process()
 
 template <class Impl>
 const char *
-BackEnd<Impl>::DCacheCompletionEvent::description()
+BackEnd<Impl>::DCacheCompletionEvent::description() const
 {
     return "Cache completion";
 }
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index 036db1351..61abae807 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -306,7 +306,7 @@ class OzoneCPU : public BaseCPU
 
         TickEvent(OzoneCPU *c, int w);
         void process();
-        const char *description();
+        const char *description() const;
     };
 
     TickEvent tickEvent;
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index 5080c54f6..0c7105382 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -82,7 +82,7 @@ OzoneCPU<Impl>::TickEvent::process()
 
 template <class Impl>
 const char *
-OzoneCPU<Impl>::TickEvent::description()
+OzoneCPU<Impl>::TickEvent::description() const
 {
     return "OzoneCPU tick";
 }
diff --git a/src/cpu/ozone/inorder_back_end.hh b/src/cpu/ozone/inorder_back_end.hh
index 4fd8e02f8..aef29b1e2 100644
--- a/src/cpu/ozone/inorder_back_end.hh
+++ b/src/cpu/ozone/inorder_back_end.hh
@@ -161,7 +161,7 @@ class InorderBackEnd
         DCacheCompletionEvent(InorderBackEnd *_be);
 
         virtual void process();
-        virtual const char *description();
+        virtual const char *description() const;
 
         DynInstPtr inst;
     };
diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index c57fa0200..cf8634a42 100644
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -538,7 +538,7 @@ InorderBackEnd<Impl>::DCacheCompletionEvent::process()
 
 template <class Impl>
 const char *
-InorderBackEnd<Impl>::DCacheCompletionEvent::description()
+InorderBackEnd<Impl>::DCacheCompletionEvent::description() const
 {
     return "DCache completion";
 }
diff --git a/src/cpu/ozone/inst_queue.hh b/src/cpu/ozone/inst_queue.hh
index 0158fd2d2..a11d5204b 100644
--- a/src/cpu/ozone/inst_queue.hh
+++ b/src/cpu/ozone/inst_queue.hh
@@ -99,7 +99,7 @@ class InstQueue
                      InstQueue<Impl> *iq_ptr);
 
         virtual void process();
-        virtual const char *description();
+        virtual const char *description() const;
     };
 #endif
     /** Constructs an IQ. */
diff --git a/src/cpu/ozone/inst_queue_impl.hh b/src/cpu/ozone/inst_queue_impl.hh
index 461c7eb0f..3c3084757 100644
--- a/src/cpu/ozone/inst_queue_impl.hh
+++ b/src/cpu/ozone/inst_queue_impl.hh
@@ -62,7 +62,7 @@ InstQueue<Impl>::FUCompletion::process()
 
 template <class Impl>
 const char *
-InstQueue<Impl>::FUCompletion::description()
+InstQueue<Impl>::FUCompletion::description() const
 {
     return "Functional unit completion";
 }
diff --git a/src/cpu/ozone/lsq_unit.hh b/src/cpu/ozone/lsq_unit.hh
index 056c79521..981682c26 100644
--- a/src/cpu/ozone/lsq_unit.hh
+++ b/src/cpu/ozone/lsq_unit.hh
@@ -80,7 +80,7 @@ class OzoneLSQ {
         void process();
 
         /** Returns the description of this event. */
-        const char *description();
+        const char *description() const;
 
       private:
         /** The store index of the store being written back. */
diff --git a/src/cpu/ozone/lsq_unit_impl.hh b/src/cpu/ozone/lsq_unit_impl.hh
index e08e54835..84a90eede 100644
--- a/src/cpu/ozone/lsq_unit_impl.hh
+++ b/src/cpu/ozone/lsq_unit_impl.hh
@@ -60,7 +60,7 @@ OzoneLSQ<Impl>::StoreCompletionEvent::process()
 
 template <class Impl>
 const char *
-OzoneLSQ<Impl>::StoreCompletionEvent::description()
+OzoneLSQ<Impl>::StoreCompletionEvent::description() const
 {
     return "LSQ store completion";
 }
diff --git a/src/cpu/ozone/lw_back_end.hh b/src/cpu/ozone/lw_back_end.hh
index 08a6863d0..a335ab7dc 100644
--- a/src/cpu/ozone/lw_back_end.hh
+++ b/src/cpu/ozone/lw_back_end.hh
@@ -94,7 +94,7 @@ class LWBackEnd
         TrapEvent(LWBackEnd<Impl> *_be);
 
         void process();
-        const char *description();
+        const char *description() const;
     };
 
     LWBackEnd(Params *params);
diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index 42788cee1..a5d79a789 100644
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -119,7 +119,7 @@ LWBackEnd<Impl>::TrapEvent::process()
 
 template <class Impl>
 const char *
-LWBackEnd<Impl>::TrapEvent::description()
+LWBackEnd<Impl>::TrapEvent::description() const
 {
     return "Trap";
 }
diff --git a/src/cpu/ozone/lw_lsq.hh b/src/cpu/ozone/lw_lsq.hh
index ba40e9ce1..7fc8b6307 100644
--- a/src/cpu/ozone/lw_lsq.hh
+++ b/src/cpu/ozone/lw_lsq.hh
@@ -329,7 +329,7 @@ class OzoneLWLSQ {
         void process();
 
         /** Returns the description of this event. */
-        const char *description();
+        const char *description() const;
 
       private:
         /** Instruction whose results are being written back. */
diff --git a/src/cpu/ozone/lw_lsq_impl.hh b/src/cpu/ozone/lw_lsq_impl.hh
index 82191312a..00e52e039 100644
--- a/src/cpu/ozone/lw_lsq_impl.hh
+++ b/src/cpu/ozone/lw_lsq_impl.hh
@@ -55,7 +55,7 @@ OzoneLWLSQ<Impl>::WritebackEvent::process()
 
 template<class Impl>
 const char *
-OzoneLWLSQ<Impl>::WritebackEvent::description()
+OzoneLWLSQ<Impl>::WritebackEvent::description() const
 {
     return "Store writeback";
 }
diff --git a/src/cpu/quiesce_event.cc b/src/cpu/quiesce_event.cc
index 3495a0e52..81384d529 100644
--- a/src/cpu/quiesce_event.cc
+++ b/src/cpu/quiesce_event.cc
@@ -45,7 +45,7 @@ EndQuiesceEvent::process()
 }
 
 const char*
-EndQuiesceEvent::description()
+EndQuiesceEvent::description() const
 {
     return "End Quiesce";
 }
diff --git a/src/cpu/quiesce_event.hh b/src/cpu/quiesce_event.hh
index 3de40f97e..85c88ab32 100644
--- a/src/cpu/quiesce_event.hh
+++ b/src/cpu/quiesce_event.hh
@@ -47,7 +47,7 @@ struct EndQuiesceEvent : public Event
     virtual void process();
 
     /** Event description */
-    virtual const char *description();
+    virtual const char *description() const;
 };
 
 #endif // __CPU_QUIESCE_EVENT_HH__
diff --git a/src/cpu/simple/atomic.cc b/src/cpu/simple/atomic.cc
index aa548b46f..2254d44d5 100644
--- a/src/cpu/simple/atomic.cc
+++ b/src/cpu/simple/atomic.cc
@@ -55,7 +55,7 @@ AtomicSimpleCPU::TickEvent::process()
 }
 
 const char *
-AtomicSimpleCPU::TickEvent::description()
+AtomicSimpleCPU::TickEvent::description() const
 {
     return "AtomicSimpleCPU tick";
 }
diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index f14dd6f99..19bc0e13b 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -68,7 +68,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU
 
         TickEvent(AtomicSimpleCPU *c);
         void process();
-        const char *description();
+        const char *description() const;
     };
 
     TickEvent tickEvent;
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index e1fc6882f..9fe3d2fff 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -822,7 +822,7 @@ TimingSimpleCPU::IprEvent::process()
 }
 
 const char *
-TimingSimpleCPU::IprEvent::description()
+TimingSimpleCPU::IprEvent::description() const
 {
     return "Timing Simple CPU Delay IPR event";
 }
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 79fbe0f5f..f8b77604a 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -101,7 +101,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
 
             TickEvent(TimingSimpleCPU *_cpu)
                 :Event(&mainEventQueue), cpu(_cpu) {}
-            const char *description() { return "Timing CPU tick"; }
+            const char *description() const { return "Timing CPU tick"; }
             void schedule(PacketPtr _pkt, Tick t);
         };
 
@@ -127,7 +127,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
             ITickEvent(TimingSimpleCPU *_cpu)
                 : TickEvent(_cpu) {}
             void process();
-            const char *description() { return "Timing CPU icache tick"; }
+            const char *description() const { return "Timing CPU icache tick"; }
         };
 
         ITickEvent tickEvent;
@@ -155,7 +155,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
             DTickEvent(TimingSimpleCPU *_cpu)
                 : TickEvent(_cpu) {}
             void process();
-            const char *description() { return "Timing CPU dcache tick"; }
+            const char *description() const { return "Timing CPU dcache tick"; }
         };
 
         DTickEvent tickEvent;
@@ -219,7 +219,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
         TimingSimpleCPU *cpu;
         IprEvent(Packet *_pkt, TimingSimpleCPU *_cpu, Tick t);
         virtual void process();
-        virtual const char *description();
+        virtual const char *description() const;
     };
 
     void completeDrain();
diff --git a/src/cpu/trace/opt_cpu.cc b/src/cpu/trace/opt_cpu.cc
index 33da3d870..10e71db7b 100644
--- a/src/cpu/trace/opt_cpu.cc
+++ b/src/cpu/trace/opt_cpu.cc
@@ -204,7 +204,7 @@ OptCPU::TickEvent::process()
 }
 
 const char *
-OptCPU::TickEvent::description()
+OptCPU::TickEvent::description() const
 {
     return "OptCPU tick";
 }
diff --git a/src/cpu/trace/opt_cpu.hh b/src/cpu/trace/opt_cpu.hh
index dfb122319..9d98eebc6 100644
--- a/src/cpu/trace/opt_cpu.hh
+++ b/src/cpu/trace/opt_cpu.hh
@@ -81,7 +81,7 @@ class OptCPU : public SimObject
         /**
          * Return a string description of this event.
          */
-        const char *description();
+        const char *description() const;
     };
 
     TickEvent tickEvent;
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index d3cf34e9d..ab00b3093 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -129,7 +129,7 @@ TraceCompleteEvent::process()
 }
 
 const char *
-TraceCompleteEvent::description()
+TraceCompleteEvent::description() const
 {
     return "trace access complete";
 }
@@ -146,7 +146,7 @@ TraceCPU::TickEvent::process()
 }
 
 const char *
-TraceCPU::TickEvent::description()
+TraceCPU::TickEvent::description() const
 {
     return "TraceCPU tick";
 }
diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh
index b88c7072e..a1ae4dc80 100644
--- a/src/cpu/trace/trace_cpu.hh
+++ b/src/cpu/trace/trace_cpu.hh
@@ -93,7 +93,7 @@ class TraceCPU : public SimObject
         /**
          * Return a string description of this event.
          */
-        const char *description();
+        const char *description() const;
     };
 
     TickEvent tickEvent;
@@ -135,7 +135,7 @@ class TraceCompleteEvent : public Event
 
     void process();
 
-    virtual const char *description();
+    virtual const char *description() const;
 };
 
 #endif // __CPU_TRACE_TRACE_CPU_HH__