Add comments in code to describe bug conditions.

This should help if somebody gets to the bug
fix before me (or someone else)...

--HG--
extra : convert_revision : 0ae64c58ef4f7b02996f31e9e9e6bfad344719e2

2 files changed, 17 insertions, 2 deletions

diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 84aea0479..c75a08213 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -671,7 +671,12 @@ FullO3CPU<Impl>::removeThread(unsigned tid)
 
     // Copy Thread Data From RegFile
     // If thread is suspended, it might be re-allocated
-    //this->copyToTC(tid);
+    // this->copyToTC(tid);
+
+
+    // @todo: 2-27-2008: Fix how we free up rename mappings
+    // here to alleviate the case for double-freeing registers
+    // in SMT workloads.
 
     // Unbind Int Regs from Rename Map
     for (int ireg = 0; ireg < TheISA::NumIntRegs; ireg++) {
diff --git a/src/cpu/o3/free_list.hh b/src/cpu/o3/free_list.hh
index d05068800..97b56909e 100644
--- a/src/cpu/o3/free_list.hh
+++ b/src/cpu/o3/free_list.hh
@@ -174,7 +174,17 @@ SimpleFreeList::addReg(PhysRegIndex freed_reg)
             freeFloatRegs.push(freed_reg);
     }
 
-    //assert(freeIntRegs.size() <= numPhysicalIntRegs);
+    // These assert conditions ensure that the number of free
+    // registers are not more than the # of total Physical  Registers.
+    // If this were false, it would mean that registers
+    // have been freed twice, overflowing the free register
+    // pool and potentially crashing SMT workloads.
+    // ----
+    // Comment out for now so as to not potentially break
+    // CMP and single-threaded workloads
+    // ----
+    // assert(freeIntRegs.size() <= numPhysicalIntRegs);
+    // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
 }
 
 inline void