Ports now have a pointer to the MemObject that owns it (can be NULL).

src/cpu/simple/atomic.hh:
    Port now takes in the MemObject that owns it.
src/cpu/simple/timing.hh:
    Port now takes in MemObject that owns it.
src/dev/io_device.cc:
src/mem/bus.hh:
    Ports now take in the MemObject that owns it.
src/mem/cache/base_cache.cc:
    Ports now take in the MemObject that own it.
src/mem/port.hh:
src/mem/tport.hh:
    Ports now optionally take in the MemObject that owns it.

--HG--
extra : convert_revision : 890a72a871795987c2236c65937e06973412d349

2 files changed, 4 insertions, 2 deletions

diff --git a/src/cpu/simple/atomic.hh b/src/cpu/simple/atomic.hh
index 0edca9369..166a18127 100644
--- a/src/cpu/simple/atomic.hh
+++ b/src/cpu/simple/atomic.hh
@@ -87,7 +87,7 @@ class AtomicSimpleCPU : public BaseSimpleCPU
       public:
 
         CpuPort(const std::string &_name, AtomicSimpleCPU *_cpu)
-            : Port(_name), cpu(_cpu)
+            : Port(_name, _cpu), cpu(_cpu)
         { }
 
       protected:
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 577e13e40..408fa315e 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -79,7 +79,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
       public:
 
         CpuPort(const std::string &_name, TimingSimpleCPU *_cpu, Tick _lat)
-            : Port(_name), cpu(_cpu), lat(_lat)
+            : Port(_name, _cpu), cpu(_cpu), lat(_lat)
         { }
 
       protected:
@@ -166,6 +166,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
     PacketPtr ifetch_pkt;
     PacketPtr dcache_pkt;
 
+
+
     int cpu_id;
     Tick previousTick;