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author | Andreas Hansson <andreas.hansson@arm.com> | 2013-09-04 13:22:55 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-09-04 13:22:55 -0400 |
commit | bb1d2f39575795f0b369bb3cabb52c9d42a8b1c6 (patch) | |
tree | 5c153972f9db3abd382046baa33fd3140869f66c /src/cpu | |
parent | cead68a78189f764a98be88206592884cdde75ec (diff) | |
download | gem5-bb1d2f39575795f0b369bb3cabb52c9d42a8b1c6.tar.xz |
arch: Header clean up for NOISA resurrection
This patch is a first step to getting NOISA working again. A number of
redundant includes make life more difficult than it has to be and this
patch simply removes them. There are also some redundant forward
declarations removed.
Diffstat (limited to 'src/cpu')
-rw-r--r-- | src/cpu/intr_control.hh | 1 | ||||
-rw-r--r-- | src/cpu/static_inst.hh | 6 |
2 files changed, 0 insertions, 7 deletions
diff --git a/src/cpu/intr_control.hh b/src/cpu/intr_control.hh index ee7b3ea7f..f8ded6f39 100644 --- a/src/cpu/intr_control.hh +++ b/src/cpu/intr_control.hh @@ -35,7 +35,6 @@ #include <vector> #include "base/misc.hh" -#include "cpu/base.hh" #include "params/IntrControl.hh" #include "sim/sim_object.hh" #include "sim/system.hh" diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index 507decbdf..0464eda14 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -46,20 +46,14 @@ #include "sim/fault_fwd.hh" // forward declarations -struct AlphaSimpleImpl; -struct OzoneImpl; -struct SimpleImpl; -class DynInst; class Packet; struct O3CPUImpl; template <class Impl> class BaseO3DynInst; typedef BaseO3DynInst<O3CPUImpl> O3DynInst; -template <class Impl> class OzoneDynInst; class InOrderDynInst; class CheckerCPU; -class FastCPU; class AtomicSimpleCPU; class TimingSimpleCPU; class InorderCPU; |