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authorDam Sunwoo <dam.sunwoo@arm.com>2012-11-02 11:32:01 -0500
committerDam Sunwoo <dam.sunwoo@arm.com>2012-11-02 11:32:01 -0500
commit81406018b0688e956452cd3e00c1ab9aeb9af764 (patch)
treea25309e3a443f1c41a33585c3e7d1a55c2213c49 /src/cpu
parent322daba74c122c4ba8c89b73ca8107be02990e5c (diff)
downloadgem5-81406018b0688e956452cd3e00c1ab9aeb9af764.tar.xz
ARM: dump stats and process info on context switches
This patch enables dumping statistics and Linux process information on context switch boundaries (__switch_to() calls) that are used for Streamline integration (a graphical statistics viewer from ARM).
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/base.cc11
-rw-r--r--src/cpu/base.hh19
-rw-r--r--src/cpu/pc_event.cc1
3 files changed, 30 insertions, 1 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 93c9f8629..aaf9c9cbc 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -118,6 +118,7 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
: MemObject(p), instCnt(0), _cpuId(p->cpu_id),
_instMasterId(p->system->getMasterId(name() + ".inst")),
_dataMasterId(p->system->getMasterId(name() + ".data")),
+ _taskId(ContextSwitchTaskId::Unknown), _pid(Request::invldPid),
interrupts(p->interrupts), profileEvent(NULL),
numThreads(p->numThreads), system(p->system)
{
@@ -359,6 +360,8 @@ BaseCPU::takeOverFrom(BaseCPU *oldCPU)
{
assert(threadContexts.size() == oldCPU->threadContexts.size());
assert(_cpuId == oldCPU->cpuId());
+ _pid = oldCPU->getPid();
+ _taskId = oldCPU->taskId();
ThreadID size = threadContexts.size();
for (ThreadID i = 0; i < size; ++i) {
@@ -489,6 +492,13 @@ void
BaseCPU::serialize(std::ostream &os)
{
SERIALIZE_SCALAR(instCnt);
+
+ /* Unlike _pid, _taskId is not serialized, as they are dynamically
+ * assigned unique ids that are only meaningful for the duration of
+ * a specific run. We will need to serialize the entire taskMap in
+ * system. */
+ SERIALIZE_SCALAR(_pid);
+
interrupts->serialize(os);
}
@@ -496,6 +506,7 @@ void
BaseCPU::unserialize(Checkpoint *cp, const std::string &section)
{
UNSERIALIZE_SCALAR(instCnt);
+ UNSERIALIZE_SCALAR(_pid);
interrupts->unserialize(cp, section);
}
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 91cef24ed..6552be0d6 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -103,6 +103,17 @@ class BaseCPU : public MemObject
/** data side request id that must be placed in all requests */
MasterID _dataMasterId;
+ /** An intrenal representation of a task identifier within gem5. This is
+ * used so the CPU can add which taskId (which is an internal representation
+ * of the OS process ID) to each request so components in the memory system
+ * can track which process IDs are ultimately interacting with them
+ */
+ uint32_t _taskId;
+
+ /** The current OS process ID that is executing on this processor. This is
+ * used to generate a taskId */
+ uint32_t _pid;
+
/**
* Define a base class for the CPU ports (instruction and data)
* that is refined in the subclasses. This class handles the
@@ -174,6 +185,14 @@ class BaseCPU : public MemObject
BaseMasterPort &getMasterPort(const std::string &if_name,
PortID idx = InvalidPortID);
+ /** Get cpu task id */
+ uint32_t taskId() const { return _taskId; }
+ /** Set cpu task id */
+ void taskId(uint32_t id) { _taskId = id; }
+
+ uint32_t getPid() const { return _pid; }
+ void setPid(uint32_t pid) { _pid = pid; }
+
inline void workItemBegin() { numWorkItemsStarted++; }
inline void workItemEnd() { numWorkItemsCompleted++; }
// @todo remove me after debugging with legion done
diff --git a/src/cpu/pc_event.cc b/src/cpu/pc_event.cc
index 2b54ee5fb..c957fe4d5 100644
--- a/src/cpu/pc_event.cc
+++ b/src/cpu/pc_event.cc
@@ -30,7 +30,6 @@
*/
#include <algorithm>
-#include <map>
#include <string>
#include <utility>