summaryrefslogtreecommitdiff
path: root/src/cpu
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2012-06-04 10:57:23 -0700
committerGabe Black <gblack@eecs.umich.edu>2012-06-04 10:57:23 -0700
commit008b17d8161ef1d880347bfbbe49336a1446e56e (patch)
tree7b3a159ed5369ae1bfc1c8fedb970e426a77e0c9 /src/cpu
parent6437f3f4ee5275f59a4472d95e0abac1a8b82e22 (diff)
downloadgem5-008b17d8161ef1d880347bfbbe49336a1446e56e.tar.xz
ISA: Turn the ExtMachInst NoopMachinst into the StaticInstPtr NoopStaticInst.
This eliminates a use of the ExtMachInst type outside of the ISAs.
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/o3/fetch_impl.hh3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index b6eb25c08..40fe5ae01 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -661,8 +661,7 @@ DefaultFetch<Impl>::finishTranslation(Fault fault, RequestPtr mem_req)
DPRINTF(Fetch, "[tid:%i]: Translation faulted, building noop.\n", tid);
// We will use a nop in ordier to carry the fault.
- DynInstPtr instruction = buildInst(tid,
- decoder[tid]->decode(TheISA::NoopMachInst, fetchPC.instAddr()),
+ DynInstPtr instruction = buildInst(tid, TheISA::NoopStaticInst,
NULL, fetchPC, fetchPC, false);
instruction->setPredTarg(fetchPC);