I missed a couple of WithEffects, this should do it

--HG--
extra : convert_revision : 19fce78a19b27b7ccb5e3653a64b46e6d5292915

3 files changed, 12 insertions, 12 deletions

diff --git a/src/cpu/o3/alpha/dyn_inst.hh b/src/cpu/o3/alpha/dyn_inst.hh
index 6c27e890a..20759d849 100644
--- a/src/cpu/o3/alpha/dyn_inst.hh
+++ b/src/cpu/o3/alpha/dyn_inst.hh
@@ -125,7 +125,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
     }
 
     /** Reads a miscellaneous register. */
-    TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
+    TheISA::MiscReg readMiscRegOperandNoEffect(const StaticInst *si, int idx)
     {
         return this->cpu->readMiscRegNoEffect(
                 si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -135,7 +135,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
     /** Reads a misc. register, including any side-effects the read
      * might have as defined by the architecture.
      */
-    TheISA::MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
+    TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readMiscReg(
                 si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -143,7 +143,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
     }
 
     /** Sets a misc. register. */
-    void setMiscRegOperand(const StaticInst * si, int idx, const MiscReg &val)
+    void setMiscRegOperandNoEffect(const StaticInst * si, int idx, const MiscReg &val)
     {
         this->instResult.integer = val;
         return this->cpu->setMiscRegNoEffect(
@@ -154,7 +154,7 @@ class AlphaDynInst : public BaseDynInst<Impl>
     /** Sets a misc. register, including any side-effects the write
      * might have as defined by the architecture.
      */
-    void setMiscRegOperandWithEffect(const StaticInst *si, int idx,
+    void setMiscRegOperand(const StaticInst *si, int idx,
                                      const MiscReg &val)
     {
         return this->cpu->setMiscReg(
diff --git a/src/cpu/o3/sparc/dyn_inst.hh b/src/cpu/o3/sparc/dyn_inst.hh
index bd61b0384..72242b161 100644
--- a/src/cpu/o3/sparc/dyn_inst.hh
+++ b/src/cpu/o3/sparc/dyn_inst.hh
@@ -107,7 +107,7 @@ class SparcDynInst : public BaseDynInst<Impl>
     }
 
     /** Reads a miscellaneous register. */
-    TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
+    TheISA::MiscReg readMiscRegOperandNoEffect(const StaticInst *si, int idx)
     {
         return this->cpu->readMiscRegNoEffect(
                 si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -117,7 +117,7 @@ class SparcDynInst : public BaseDynInst<Impl>
     /** Reads a misc. register, including any side-effects the read
      * might have as defined by the architecture.
      */
-    TheISA::MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
+    TheISA::MiscReg readMiscRegOperand(const StaticInst *si, int idx)
     {
         return this->cpu->readMiscReg(
                 si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag,
@@ -125,7 +125,7 @@ class SparcDynInst : public BaseDynInst<Impl>
     }
 
     /** Sets a misc. register. */
-    void setMiscRegOperand(const StaticInst * si,
+    void setMiscRegOperandNoEffect(const StaticInst * si,
             int idx, const TheISA::MiscReg &val)
     {
         this->instResult.integer = val;
@@ -137,7 +137,7 @@ class SparcDynInst : public BaseDynInst<Impl>
     /** Sets a misc. register, including any side-effects the write
      * might have as defined by the architecture.
      */
-    void setMiscRegOperandWithEffect(
+    void setMiscRegOperand(
             const StaticInst *si, int idx, const TheISA::MiscReg &val)
     {
         return this->cpu->setMiscReg(
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 980ea2f96..eae24014b 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -304,25 +304,25 @@ class BaseSimpleCPU : public BaseCPU
         return thread->setMiscReg(misc_reg, val);
     }
 
-    MiscReg readMiscRegOperand(const StaticInst *si, int idx)
+    MiscReg readMiscRegOperandNoEffect(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
         return thread->readMiscRegNoEffect(reg_idx);
     }
 
-    MiscReg readMiscRegOperandWithEffect(const StaticInst *si, int idx)
+    MiscReg readMiscRegOperand(const StaticInst *si, int idx)
     {
         int reg_idx = si->srcRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
         return thread->readMiscReg(reg_idx);
     }
 
-    void setMiscRegOperand(const StaticInst *si, int idx, const MiscReg &val)
+    void setMiscRegOperandNoEffect(const StaticInst *si, int idx, const MiscReg &val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;
         return thread->setMiscRegNoEffect(reg_idx, val);
     }
 
-    void setMiscRegOperandWithEffect(
+    void setMiscRegOperand(
             const StaticInst *si, int idx, const MiscReg &val)
     {
         int reg_idx = si->destRegIdx(idx) - TheISA::Ctrl_Base_DepTag;