Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.

13 files changed, 19 insertions, 59 deletions

diff --git a/src/cpu/checker/cpu.cc b/src/cpu/checker/cpu.cc
index fda0528ad..7dacc58ff 100644
--- a/src/cpu/checker/cpu.cc
+++ b/src/cpu/checker/cpu.cc
@@ -72,8 +72,7 @@ CheckerCPU::CheckerCPU(Params *p)
     systemPtr = NULL;
 #else
     process = p->process;
-    thread = new SimpleThread(this, /* thread_num */ 0, process,
-                              /* asid */ 0);
+    thread = new SimpleThread(this, /* thread_num */ 0, process);
 
     tc = thread->getTC();
     threadContexts.push_back(tc);
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 36de86986..a2367db63 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -207,12 +207,12 @@ InOrderCPU::InOrderCPU(Params *params)
             DPRINTF(InOrderCPU, "Workload[%i] process is %#x\n",
                     tid, this->thread[tid]);
             this->thread[tid] =
-                new Thread(this, tid, params->workload[tid], tid);
+                new Thread(this, tid, params->workload[tid]);
         } else {
             //Allocate Empty thread so M5 can use later
             //when scheduling threads to CPU
             Process* dummy_proc = params->workload[0];
-            this->thread[tid] = new Thread(this, tid, dummy_proc, tid);
+            this->thread[tid] = new Thread(this, tid, dummy_proc);
         }
 
         // Setup the TC that will serve as the interface to the threads/CPU.
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 595a38ecc..75d77c818 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -395,14 +395,6 @@ class InOrderCPU : public BaseCPU
         return cpuEventNum++;
     }
 
-    /** Get instruction asid. */
-    int getInstAsid(ThreadID tid)
-    { return thread[tid]->getInstAsid(); }
-
-    /** Get data asid. */
-    int getDataAsid(ThreadID tid)
-    { return thread[tid]->getDataAsid(); }
-
     /** Register file accessors  */
     uint64_t readIntReg(int reg_idx, ThreadID tid);
 
diff --git a/src/cpu/inorder/thread_state.hh b/src/cpu/inorder/thread_state.hh
index 803659487..9b3b39fcb 100644
--- a/src/cpu/inorder/thread_state.hh
+++ b/src/cpu/inorder/thread_state.hh
@@ -68,9 +68,9 @@ class InOrderThreadState : public ThreadState {
 
 
     InOrderThreadState(InOrderCPU *_cpu, ThreadID _thread_num,
-                       Process *_process, int _asid)
+                       Process *_process)
         : ThreadState(reinterpret_cast<BaseCPU*>(_cpu), 0/*_thread_num*/,
-                      _process, 0/*_asid*/),
+                      _process),
           cpu(_cpu), inSyscall(0), trapPending(0)
     { }
 
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 394efe16a..6722941e4 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -361,7 +361,7 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
                     tid, this->thread[tid]);
             this->thread[tid] = new typename FullO3CPU<Impl>::Thread(
                     (typename Impl::O3CPU *)(this),
-                    tid, params->workload[tid], tid);
+                    tid, params->workload[tid]);
 
             //usedTids[tid] = true;
             //threadMap[tid] = tid;
@@ -372,7 +372,7 @@ FullO3CPU<Impl>::FullO3CPU(DerivO3CPUParams *params)
 
             this->thread[tid] = new typename FullO3CPU<Impl>::Thread(
                     (typename Impl::O3CPU *)(this),
-                    tid, dummy_proc, tid);
+                    tid, dummy_proc);
             //usedTids[tid] = false;
         }
 #endif // !FULL_SYSTEM
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index c077b2493..0cc8eab78 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -392,23 +392,6 @@ class FullO3CPU : public BaseO3CPU
 
     /** Check if this address is a valid data address. */
     bool validDataAddr(Addr addr) { return true; }
-
-    /** Get instruction asid. */
-    int getInstAsid(ThreadID tid)
-    { return isa[tid].instAsid(); }
-
-    /** Get data asid. */
-    int getDataAsid(ThreadID tid)
-    { return isa[tid].dataAsid(); }
-#else
-    /** Get instruction asid. */
-    int getInstAsid(ThreadID tid)
-    { return thread[tid]->getInstAsid(); }
-
-    /** Get data asid. */
-    int getDataAsid(ThreadID tid)
-    { return thread[tid]->getDataAsid(); }
-
 #endif
 
     /** Register accessors.  Index refers to the physical register index. */
diff --git a/src/cpu/o3/thread_state.hh b/src/cpu/o3/thread_state.hh
index 1f0e7a3bb..1171053b9 100644
--- a/src/cpu/o3/thread_state.hh
+++ b/src/cpu/o3/thread_state.hh
@@ -95,8 +95,8 @@ struct O3ThreadState : public ThreadState {
         profilePC = 3;
     }
 #else
-    O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process, int _asid)
-        : ThreadState(_cpu, _thread_num, _process, _asid),
+    O3ThreadState(O3CPU *_cpu, int _thread_num, Process *_process)
+        : ThreadState(_cpu, _thread_num, _process),
           cpu(_cpu), inSyscall(0), trapPending(0)
     { }
 #endif
diff --git a/src/cpu/ozone/thread_state.hh b/src/cpu/ozone/thread_state.hh
index 53776e7d9..971fba886 100644
--- a/src/cpu/ozone/thread_state.hh
+++ b/src/cpu/ozone/thread_state.hh
@@ -86,9 +86,8 @@ struct OzoneThreadState : public ThreadState {
         miscRegFile.clear();
     }
 #else
-    OzoneThreadState(CPUType *_cpu, int _thread_num, Process *_process,
-                     int _asid)
-        : ThreadState(_cpu, -1, _thread_num, _process, _asid),
+    OzoneThreadState(CPUType *_cpu, int _thread_num, Process *_process)
+        : ThreadState(_cpu, -1, _thread_num, _process),
           cpu(_cpu), inSyscall(0), trapPending(0)
     {
         miscRegFile.clear();
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 279fb98b7..921c8c19d 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -78,7 +78,7 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
     thread = new SimpleThread(this, 0, p->system, p->itb, p->dtb);
 #else
     thread = new SimpleThread(this, /* thread_num */ 0, p->workload[0],
-            p->itb, p->dtb, /* asid */ 0);
+            p->itb, p->dtb);
 #endif // !FULL_SYSTEM
 
     thread->setStatus(ThreadContext::Halted);
diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index dde63d7d9..22bc283a3 100644
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -92,8 +92,8 @@ SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, System *_sys,
 }
 #else
 SimpleThread::SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
-                           TheISA::TLB *_itb, TheISA::TLB *_dtb, int _asid)
-    : ThreadState(_cpu, _thread_num, _process, _asid),
+                           TheISA::TLB *_itb, TheISA::TLB *_dtb)
+    : ThreadState(_cpu, _thread_num, _process),
       cpu(_cpu), itb(_itb), dtb(_dtb)
 {
     clearArchRegs();
@@ -106,7 +106,7 @@ SimpleThread::SimpleThread()
 #if FULL_SYSTEM
     : ThreadState(NULL, -1)
 #else
-    : ThreadState(NULL, -1, NULL, -1)
+    : ThreadState(NULL, -1, NULL)
 #endif
 {
     tc = new ProxyThreadContext<SimpleThread>(this);
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 00263d455..d9d624e77 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -145,7 +145,7 @@ class SimpleThread : public ThreadState
                  bool use_kernel_stats = true);
 #else
     SimpleThread(BaseCPU *_cpu, int _thread_num, Process *_process,
-                 TheISA::TLB *_itb, TheISA::TLB *_dtb, int _asid);
+                 TheISA::TLB *_itb, TheISA::TLB *_dtb);
 #endif
 
     SimpleThread();
@@ -191,9 +191,6 @@ class SimpleThread : public ThreadState
     }
 
 #if FULL_SYSTEM
-    int getInstAsid() { return isa.instAsid(); }
-    int getDataAsid() { return isa.dataAsid(); }
-
     void dumpFuncProfile();
 
     Fault hwrei();
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index 53a56d9a6..c62a7a3be 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -45,8 +45,7 @@
 #if FULL_SYSTEM
 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid)
 #else
-ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid,
-                         Process *_process, short _asid)
+ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
 #endif
     : numInst(0), numLoad(0), _status(ThreadContext::Halted),
       baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
@@ -54,7 +53,7 @@ ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid,
       profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
       kernelStats(NULL), physPort(NULL), virtPort(NULL),
 #else
-      port(NULL), process(_process), asid(_asid),
+      port(NULL), process(_process),
 #endif
       funcExeInst(0), storeCondFailures(0)
 {
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index ba61f431d..5c7c0ea56 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -68,7 +68,7 @@ struct ThreadState {
 #if FULL_SYSTEM
     ThreadState(BaseCPU *cpu, ThreadID _tid);
 #else
-    ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process, short _asid);
+    ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process);
 #endif
 
     ~ThreadState();
@@ -119,9 +119,6 @@ struct ThreadState {
     TranslatingPort *getMemPort();
 
     void setMemPort(TranslatingPort *_port) { port = _port; }
-
-    int getInstAsid() { return asid; }
-    int getDataAsid() { return asid; }
 #endif
 
     /** Sets the current instruction being committed. */
@@ -205,12 +202,6 @@ struct ThreadState {
     TranslatingPort *port;
 
     Process *process;
-
-    // Address space ID.  Note that this is used for TIMING cache
-    // simulation only; all functional memory accesses should use
-    // one of the FunctionalMemory pointers above.
-    short asid;
-
 #endif
 
     /** Current instruction the thread is committing.  Only set and