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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2017-11-06 15:22:43 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-05 09:44:22 +0000 |
| commit | eea11aedcfe18b29d6e63243bc1acb51441ef523 (patch) | |
| tree | a8da293007189f6217164adfccb3157f57679fad /src/cpu | |
| parent | 4910d36e765875b6531b13c2a98f958082cc3de0 (diff) | |
| download | gem5-eea11aedcfe18b29d6e63243bc1acb51441ef523.tar.xz | |
arch-arm: Removing Serializing flag from ISB
ISB Serializing behaviour is guaranteed by IsSquashAfter,
which is inherently serializing; when instruction is commited,
consecutive instructions are flushed and refetched.
Change-Id: I05e61b4cf9f01113d95b1502c996d04cbd69b759
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/5701
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions