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authorAli Saidi <saidi@eecs.umich.edu>2006-12-04 19:39:57 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-12-04 19:39:57 -0500
commit8e75b6e2a5137398682236e6d9a3d11b695584ea (patch)
tree22a98e840bc8d6c71563da6a67de0f766512cea8 /src/cpu
parentdb427bb3a9f7e25dc79b9f7547724328e698e338 (diff)
downloadgem5-8e75b6e2a5137398682236e6d9a3d11b695584ea.tar.xz
reogranize code to split off FS only misc regs with effect into their own file (reducing the number of if FULL_SYSTEM defines and includes)
Protect other pieces of code so that sparc compiles SE again src/arch/sparc/SConscript: Add ua2005.cc back into SConscript src/arch/sparc/miscregfile.hh: add functions that deal with priv registers so we don't have to have a bunch of if defs and other ugliness src/arch/sparc/mmaped_ipr.hh: wrap handleIpr* with if full_system so it compiles under se src/arch/sparc/ua2005.cc: reorganize edit fs only miscreg functions src/cpu/exetrace.cc: protect legion code so it doesn't try to compile under se --HG-- extra : convert_revision : 6b3c9f6f95b4da8544525f4f82e92861383ede76
Diffstat (limited to 'src/cpu')
-rw-r--r--src/cpu/exetrace.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index f135afc63..71e974a36 100644
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -279,7 +279,7 @@ Trace::InstRecord::dump(ostream &outs)
//
outs << endl;
}
-#if THE_ISA == SPARC_ISA
+#if THE_ISA == SPARC_ISA && FULL_SYSTEM
// Compare
if (flags[LEGION_LOCKSTEP])
{