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| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-10 22:19:13 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-10 22:19:13 -0500 |
| commit | 9d04510869fe66d59a168660925a8387c0fba1b8 (patch) | |
| tree | 62625bd13f32c4107ed3f24df65421e5fe086232 /src/cpu | |
| parent | 28a83c6d1c2673448aaedfb0eb131d6c6604badf (diff) | |
| download | gem5-9d04510869fe66d59a168660925a8387c0fba1b8.tar.xz | |
bug fixes to get us to 145m instructions
src/arch/sparc/intregfile.cc:
some checks to make sure that the cwp and global register flattening stuff is working. These things have caught a couple of bugs so I think it would be good to keep them around at least for now
src/arch/sparc/isa/decoder.isa:
fix smul instruction to write Y correctly
src/arch/sparc/miscregfile.cc:
legion always returns du and dl set, so we need to emulate that for now at least
--HG--
extra : convert_revision : 82f9276340888f1e43071c69504486efdcfdb3a8
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions