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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-10-08 17:16:59 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-11-26 10:12:00 +0000 |
| commit | e82a6f32cb3432566bbe9f00bc93e3b14f8db998 (patch) | |
| tree | ad9661421d7f88b67be10149035a5a34cde3424d /src/cpu | |
| parent | ca5e9c22708f6142c70d0c141a8d489bb345100a (diff) | |
| download | gem5-e82a6f32cb3432566bbe9f00bc93e3b14f8db998.tar.xz | |
arch-arm: Make the Tarmac parsed registers case insensitive
This will make parsing more robust, considering the tarmac
format changes between AA32 and AA64.
Change-Id: I0e4905d70e2e494104706a4c6c75b8169deaecf9
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22845
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/cpu')
0 files changed, 0 insertions, 0 deletions