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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-10 10:35:16 +0000 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-12-10 10:35:16 +0000 |
commit | 38e2860c36997858131dc47e1152bb583f68608e (patch) | |
tree | cb1f9959478b0a3dd06740a276e8e61fadcfaa50 /src/dev/SConscript | |
parent | 139c97c9772be38577eaa52af5d1ef3607da4bcb (diff) | |
download | gem5-38e2860c36997858131dc47e1152bb583f68608e.tar.xz |
dev: Move the CopyEngine class to src/dev/pci
--HG--
rename : src/dev/CopyEngine.py => src/dev/pci/CopyEngine.py
rename : src/dev/copy_engine.cc => src/dev/pci/copy_engine.cc
rename : src/dev/copy_engine.hh => src/dev/pci/copy_engine.hh
rename : src/dev/copy_engine_defs.hh => src/dev/pci/copy_engine_defs.hh
Diffstat (limited to 'src/dev/SConscript')
-rw-r--r-- | src/dev/SConscript | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/dev/SConscript b/src/dev/SConscript index 923417078..53bb28456 100644 --- a/src/dev/SConscript +++ b/src/dev/SConscript @@ -40,7 +40,6 @@ if env['TARGET_ISA'] == 'null': Return() SimObject('BadDevice.py') -SimObject('CopyEngine.py') SimObject('DiskImage.py') SimObject('Ethernet.py') SimObject('I2C.py') @@ -51,7 +50,6 @@ SimObject('Terminal.py') SimObject('Uart.py') Source('baddev.cc') -Source('copy_engine.cc') Source('disk_image.cc') Source('dma_device.cc') Source('etherbus.cc') @@ -85,7 +83,6 @@ Source('uart8250.cc') DebugFlag('DiskImageRead') DebugFlag('DiskImageWrite') DebugFlag('DMA') -DebugFlag('DMACopyEngine') DebugFlag('Ethernet') DebugFlag('MultiEthernet') DebugFlag('MultiEthernetPkt') |