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authorAndreas Sandberg <andreas.sandberg@arm.com>2015-12-05 00:11:24 +0000
committerAndreas Sandberg <andreas.sandberg@arm.com>2015-12-05 00:11:24 +0000
commit78275c9d2f918d245902c3c00a9486b4af8e8099 (patch)
tree9fe757b7ecc4246298d8e6eb18a83579eacba188 /src/dev/alpha/tsunami.hh
parentabfb99780033f9abf68382fb9eb29e1af1a869ee (diff)
downloadgem5-78275c9d2f918d245902c3c00a9486b4af8e8099.tar.xz
dev: Rewrite PCI host functionality
The gem5's current PCI host functionality is very ad hoc. The current implementations require PCI devices to be hooked up to the configuration space via a separate configuration port. Devices query the platform to get their config-space address range. Un-mapped parts of the config space are intercepted using the XBar's default port mechanism and a magic catch-all device (PciConfigAll). This changeset redesigns the PCI host functionality to improve code reuse and make config-space and interrupt mapping more transparent. Existing platform code has been updated to use the new PCI host and configured to stay backwards compatible (i.e., no guest-side visible changes). The current implementation does not expose any new functionality, but it can easily be extended with features such as automatic interrupt mapping. PCI devices now register themselves with a PCI host controller. The host controller interface is defined in the abstract base class PciHost. Registration is done by PciHost::registerDevice() which takes the device, its bus position (bus/dev/func tuple), and its interrupt pin (INTA-INTC) as a parameter. The registration interface returns a PciHost::DeviceInterface that the PCI device can use to query memory mappings and signal interrupts. The host device manages the entire PCI configuration space. Accesses to devices decoded into the devices bus position and then forwarded to the correct device. Basic PCI host functionality is implemented in the GenericPciHost base class. Most platforms can use this class as a basic PCI controller. It provides the following functionality: * Configurable configuration space decoding. The number of bits dedicated to a device is a prameter, making it possible to support both CAM, ECAM, and legacy mappings. * Basic interrupt mapping using the interruptLine value from a device's configuration space. This behavior is the same as in the old implementation. More advanced controllers can override the interrupt mapping method to dynamically assign host interrupts to PCI devices. * Simple (base + addr) remapping from the PCI bus's address space to physical addresses for PIO, memory, and DMA.
Diffstat (limited to 'src/dev/alpha/tsunami.hh')
-rw-r--r--src/dev/alpha/tsunami.hh39
1 files changed, 4 insertions, 35 deletions
diff --git a/src/dev/alpha/tsunami.hh b/src/dev/alpha/tsunami.hh
index c43f0e023..00df27c5c 100644
--- a/src/dev/alpha/tsunami.hh
+++ b/src/dev/alpha/tsunami.hh
@@ -86,46 +86,15 @@ class Tsunami : public Platform
typedef TsunamiParams Params;
Tsunami(const Params *p);
- /**
- * Cause the cpu to post a serial interrupt to the CPU.
- */
- void postConsoleInt() override;
+ void serialize(CheckpointOut &cp) const override;
+ void unserialize(CheckpointIn &cp) override;
- /**
- * Clear a posted CPU interrupt (id=55)
- */
+ public: // Public Platform interfaces
+ void postConsoleInt() override;
void clearConsoleInt() override;
- /**
- * Cause the chipset to post a cpi interrupt to the CPU.
- */
void postPciInt(int line) override;
-
- /**
- * Clear a posted PCI->CPU interrupt
- */
void clearPciInt(int line) override;
-
-
- Addr pciToDma(Addr pciAddr) const override;
-
- /**
- * Calculate the configuration address given a bus/dev/func.
- */
- Addr calcPciConfigAddr(int bus, int dev, int func) override;
-
- /**
- * Calculate the address for an IO location on the PCI bus.
- */
- Addr calcPciIOAddr(Addr addr) override;
-
- /**
- * Calculate the address for a memory location on the PCI bus.
- */
- Addr calcPciMemAddr(Addr addr) override;
-
- void serialize(CheckpointOut &cp) const override;
- void unserialize(CheckpointIn &cp) override;
};
#endif // __DEV_TSUNAMI_HH__