diff options
| author | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-02 21:57:07 -0500 |
|---|---|---|
| committer | Lisa Hsu <hsul@eecs.umich.edu> | 2008-11-02 21:57:07 -0500 |
| commit | d857faf073895dcfde97141bd6346fe5d4317f8e (patch) | |
| tree | bfcd9fadba95b409721597948dd46cfda3744ee0 /src/dev/alpha | |
| parent | 67fda02dda290d614de233846fee434b3713b1dc (diff) | |
| download | gem5-d857faf073895dcfde97141bd6346fe5d4317f8e.tar.xz | |
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
the primary identifier for a hardware context should be contextId(). The
concept of threads within a CPU remains, in the form of threadId() because
sometimes you need to know which context within a cpu to manipulate.
Diffstat (limited to 'src/dev/alpha')
| -rw-r--r-- | src/dev/alpha/backdoor.cc | 2 | ||||
| -rw-r--r-- | src/dev/alpha/tsunami_cchip.cc | 8 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc index 3ba6cbd24..66f682e66 100644 --- a/src/dev/alpha/backdoor.cc +++ b/src/dev/alpha/backdoor.cc @@ -84,7 +84,7 @@ void AlphaBackdoor::startup() { system->setAlphaAccess(pioAddr); - alphaAccess->numCPUs = system->getNumCPUs(); + alphaAccess->numCPUs = system->numContexts(); alphaAccess->kernStart = system->getKernelStart(); alphaAccess->kernEnd = system->getKernelEnd(); alphaAccess->entryPoint = system->getKernelEntry(); diff --git a/src/dev/alpha/tsunami_cchip.cc b/src/dev/alpha/tsunami_cchip.cc index 4477b5adc..52a2aea14 100644 --- a/src/dev/alpha/tsunami_cchip.cc +++ b/src/dev/alpha/tsunami_cchip.cc @@ -110,7 +110,13 @@ TsunamiCChip::read(PacketPtr pkt) break; case TSDEV_CC_MISC: pkt->set(((ipint << 8) & 0xF) | ((itint << 4) & 0xF) | - (pkt->req->getCpuNum() & 0x3)); + (pkt->req->contextId() & 0x3)); + // currently, FS cannot handle MT so contextId and + // cpuId are effectively the same, don't know if it will + // matter if FS becomes MT enabled. I suspect no because + // we are currently able to boot up to 64 procs anyway + // which would render the CPUID of this register useless + // anyway break; case TSDEV_CC_AAR0: case TSDEV_CC_AAR1: |