dev: Rewrite PCI host functionality

The gem5's current PCI host functionality is very ad hoc. The current
implementations require PCI devices to be hooked up to the
configuration space via a separate configuration port. Devices query
the platform to get their config-space address range. Un-mapped parts
of the config space are intercepted using the XBar's default port
mechanism and a magic catch-all device (PciConfigAll).

This changeset redesigns the PCI host functionality to improve code
reuse and make config-space and interrupt mapping more
transparent. Existing platform code has been updated to use the new
PCI host and configured to stay backwards compatible (i.e., no
guest-side visible changes). The current implementation does not
expose any new functionality, but it can easily be extended with
features such as automatic interrupt mapping.

PCI devices now register themselves with a PCI host controller. The
host controller interface is defined in the abstract base class
PciHost. Registration is done by PciHost::registerDevice() which takes
the device, its bus position (bus/dev/func tuple), and its interrupt
pin (INTA-INTC) as a parameter. The registration interface returns a
PciHost::DeviceInterface that the PCI device can use to query memory
mappings and signal interrupts.

The host device manages the entire PCI configuration space. Accesses
to devices decoded into the devices bus position and then forwarded to
the correct device.

Basic PCI host functionality is implemented in the GenericPciHost base
class. Most platforms can use this class as a basic PCI controller. It
provides the following functionality:

  * Configurable configuration space decoding. The number of bits
    dedicated to a device is a prameter, making it possible to support
    both CAM, ECAM, and legacy mappings.

  * Basic interrupt mapping using the interruptLine value from a
    device's configuration space. This behavior is the same as in the
    old implementation. More advanced controllers can override the
    interrupt mapping method to dynamically assign host interrupts to
    PCI devices.

  * Simple (base + addr) remapping from the PCI bus's address space to
    physical addresses for PIO, memory, and DMA.

5 files changed, 63 insertions, 109 deletions

diff --git a/src/dev/alpha/Tsunami.py b/src/dev/alpha/Tsunami.py
index 1a29b25d9..f807e946f 100644
--- a/src/dev/alpha/Tsunami.py
+++ b/src/dev/alpha/Tsunami.py
@@ -31,7 +31,7 @@ from m5.proxy import *
 from BadDevice import BadDevice
 from AlphaBackdoor import AlphaBackdoor
 from Device import BasicPioDevice, IsaFake, BadAddr
-from Pci import PciConfigAll
+from PciHost import GenericPciHost
 from Platform import Platform
 from Uart import Uart8250
 
@@ -50,9 +50,19 @@ class TsunamiIO(BasicPioDevice):
     tsunami = Param.Tsunami(Parent.any, "Tsunami")
     frequency = Param.Frequency('1024Hz', "frequency of interrupts")
 
-class TsunamiPChip(BasicPioDevice):
+class TsunamiPChip(GenericPciHost):
     type = 'TsunamiPChip'
     cxx_header = "dev/alpha/tsunami_pchip.hh"
+
+    conf_base = 0x801fe000000
+    conf_size = "16MB"
+
+    pci_pio_base = 0x801fc000000
+    pci_mem_base = 0x80000000000
+
+    pio_addr = Param.Addr("Device Address")
+    pio_latency = Param.Latency('100ns', "Programmed IO latency")
+
     tsunami = Param.Tsunami(Parent.any, "Tsunami")
 
 class Tsunami(Platform):
@@ -62,7 +72,6 @@ class Tsunami(Platform):
 
     cchip = TsunamiCChip(pio_addr=0x801a0000000)
     pchip = TsunamiPChip(pio_addr=0x80180000000)
-    pciconfig = PciConfigAll()
     fake_sm_chip = IsaFake(pio_addr=0x801fc000370)
 
     fake_uart1 = IsaFake(pio_addr=0x801fc0002f8)
@@ -99,8 +108,6 @@ class Tsunami(Platform):
     def attachIO(self, bus):
         self.cchip.pio = bus.master
         self.pchip.pio = bus.master
-        self.pciconfig.pio = bus.default
-        bus.use_default_range = True
         self.fake_sm_chip.pio = bus.master
         self.fake_uart1.pio = bus.master
         self.fake_uart2.pio = bus.master
diff --git a/src/dev/alpha/tsunami.cc b/src/dev/alpha/tsunami.cc
index 36b1a9ded..300b481de 100644
--- a/src/dev/alpha/tsunami.cc
+++ b/src/dev/alpha/tsunami.cc
@@ -88,31 +88,6 @@ Tsunami::clearPciInt(int line)
     cchip->clearDRIR(line);
 }
 
-Addr
-Tsunami::pciToDma(Addr pciAddr) const
-{
-    return pchip->translatePciToDma(pciAddr);
-}
-
-
-Addr
-Tsunami::calcPciConfigAddr(int bus, int dev, int func)
-{
-   return pchip->calcConfigAddr(bus, dev, func);
-}
-
-Addr
-Tsunami::calcPciIOAddr(Addr addr)
-{
-   return pchip->calcIOAddr(addr);
-}
-
-Addr
-Tsunami::calcPciMemAddr(Addr addr)
-{
-   return pchip->calcMemAddr(addr);
-}
-
 void
 Tsunami::serialize(CheckpointOut &cp) const
 {
diff --git a/src/dev/alpha/tsunami.hh b/src/dev/alpha/tsunami.hh
index c43f0e023..00df27c5c 100644
--- a/src/dev/alpha/tsunami.hh
+++ b/src/dev/alpha/tsunami.hh
@@ -86,46 +86,15 @@ class Tsunami : public Platform
     typedef TsunamiParams Params;
     Tsunami(const Params *p);
 
-    /**
-     * Cause the cpu to post a serial interrupt to the CPU.
-     */
-    void postConsoleInt() override;
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
 
-    /**
-     * Clear a posted CPU interrupt (id=55)
-     */
+  public: // Public Platform interfaces
+    void postConsoleInt() override;
     void clearConsoleInt() override;
 
-    /**
-     * Cause the chipset to post a cpi interrupt to the CPU.
-     */
     void postPciInt(int line) override;
-
-    /**
-     * Clear a posted PCI->CPU interrupt
-     */
     void clearPciInt(int line) override;
-
-
-    Addr pciToDma(Addr pciAddr) const override;
-
-    /**
-     * Calculate the configuration address given a bus/dev/func.
-     */
-    Addr calcPciConfigAddr(int bus, int dev, int func) override;
-
-    /**
-     * Calculate the address for an IO location on the PCI bus.
-     */
-    Addr calcPciIOAddr(Addr addr) override;
-
-    /**
-     * Calculate the address for a memory location on the PCI bus.
-     */
-    Addr calcPciMemAddr(Addr addr) override;
-
-    void serialize(CheckpointOut &cp) const override;
-    void unserialize(CheckpointIn &cp) override;
 };
 
 #endif // __DEV_TSUNAMI_HH__
diff --git a/src/dev/alpha/tsunami_pchip.cc b/src/dev/alpha/tsunami_pchip.cc
index cfd1e69e4..fa3d9d395 100644
--- a/src/dev/alpha/tsunami_pchip.cc
+++ b/src/dev/alpha/tsunami_pchip.cc
@@ -32,6 +32,7 @@
 /** @file
  * Tsunami PChip (pci)
  */
+#include "dev/alpha/tsunami_pchip.hh"
 
 #include <deque>
 #include <string>
@@ -41,8 +42,9 @@
 #include "config/the_isa.hh"
 #include "debug/Tsunami.hh"
 #include "dev/alpha/tsunami.hh"
-#include "dev/alpha/tsunami_pchip.hh"
+#include "dev/alpha/tsunami_cchip.hh"
 #include "dev/alpha/tsunamireg.h"
+#include "dev/pcidev.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/system.hh"
@@ -52,7 +54,9 @@ using namespace std;
 using namespace TheISA;
 
 TsunamiPChip::TsunamiPChip(const Params *p)
-    : BasicPioDevice(p, 0x1000)
+    : GenericPciHost(p),
+      pioRange(RangeSize(p->pio_addr, 0x1000)),
+      pioDelay(p->pio_latency)
 {
     for (int i = 0; i < 4; i++) {
         wsba[i] = 0;
@@ -70,9 +74,12 @@ TsunamiPChip::TsunamiPChip(const Params *p)
 Tick
 TsunamiPChip::read(PacketPtr pkt)
 {
-    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+    // We only need to handle our own configuration registers, pass
+    // unknown addresses to the generic code.
+    if (!pioRange.contains(pkt->getAddr()))
+        return GenericPciHost::read(pkt);
 
-    Addr daddr = (pkt->getAddr() - pioAddr) >> 6;;
+    Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6;;
     assert(pkt->getSize() == sizeof(uint64_t));
 
 
@@ -142,6 +149,7 @@ TsunamiPChip::read(PacketPtr pkt)
       default:
           panic("Default in PChip Read reached reading 0x%x\n", daddr);
     }
+
     pkt->makeAtomicResponse();
     return pioDelay;
 
@@ -150,8 +158,12 @@ TsunamiPChip::read(PacketPtr pkt)
 Tick
 TsunamiPChip::write(PacketPtr pkt)
 {
-    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
-    Addr daddr = (pkt->getAddr() - pioAddr) >> 6;
+    // We only need to handle our own configuration registers, pass
+    // unknown addresses to the generic code.
+    if (!pioRange.contains(pkt->getAddr()))
+        return GenericPciHost::write(pkt);
+
+    Addr daddr = (pkt->getAddr() - pioRange.start()) >> 6;
 
     assert(pkt->getSize() == sizeof(uint64_t));
 
@@ -224,10 +236,21 @@ TsunamiPChip::write(PacketPtr pkt)
     return pioDelay;
 }
 
+
+AddrRangeList
+TsunamiPChip::getAddrRanges() const
+{
+    return AddrRangeList({
+            RangeSize(confBase, confSize),
+            pioRange
+        });
+}
+
+
 #define DMA_ADDR_MASK ULL(0x3ffffffff)
 
 Addr
-TsunamiPChip::translatePciToDma(Addr busAddr)
+TsunamiPChip::dmaAddr(const PciBusAddr &dev, Addr busAddr) const
 {
     // compare the address to the window base registers
     uint64_t tbaMask = 0;
@@ -301,28 +324,6 @@ TsunamiPChip::translatePciToDma(Addr busAddr)
     return busAddr;
 }
 
-Addr
-TsunamiPChip::calcConfigAddr(int bus, int dev, int func)
-{
-    assert(func < 8);
-    assert(dev < 32);
-    assert(bus == 0);
-
-    return TsunamiPciBus0Config | (func << 8) | (dev << 11);
-}
-
-Addr
-TsunamiPChip::calcIOAddr(Addr addr)
-{
-    return TSUNAMI_PCI0_IO + addr;
-}
-
-Addr
-TsunamiPChip::calcMemAddr(Addr addr)
-{
-    return TSUNAMI_PCI0_MEMORY + addr;
-}
-
 void
 TsunamiPChip::serialize(CheckpointOut &cp) const
 {
diff --git a/src/dev/alpha/tsunami_pchip.hh b/src/dev/alpha/tsunami_pchip.hh
index 68bd20e9a..212727d61 100644
--- a/src/dev/alpha/tsunami_pchip.hh
+++ b/src/dev/alpha/tsunami_pchip.hh
@@ -36,18 +36,16 @@
 #define __TSUNAMI_PCHIP_HH__
 
 #include "dev/alpha/tsunami.hh"
-#include "dev/io_device.hh"
+#include "dev/pci/host.hh"
 #include "params/TsunamiPChip.hh"
 
 /**
  * A very simple implementation of the Tsunami PCI interface chips.
  */
-class TsunamiPChip : public BasicPioDevice
+class TsunamiPChip : public GenericPciHost
 {
   protected:
 
-    static const Addr TsunamiPciBus0Config = ULL(0x801fe000000);
-
     /** Pchip control register */
     uint64_t pctl;
 
@@ -74,23 +72,27 @@ class TsunamiPChip : public BasicPioDevice
         return dynamic_cast<const Params *>(_params);
     }
 
+
+    void serialize(CheckpointOut &cp) const override;
+    void unserialize(CheckpointIn &cp) override;
+
+  public:
+    Tick read(PacketPtr pkt) override;
+    Tick write(PacketPtr pkt) override;
+
+    AddrRangeList getAddrRanges() const override;
+
     /**
      * Translate a PCI bus address to a memory address for DMA.
      * @todo Andrew says this needs to be fixed. What's wrong with it?
-     * @param busAddr PCI address to translate.
+     * @param pci_addr PCI address to translate.
      * @return memory system address
      */
-    Addr translatePciToDma(Addr busAddr);
-
-    Addr calcConfigAddr(int bus, int dev, int func);
-    Addr calcIOAddr(Addr addr);
-    Addr calcMemAddr(Addr addr);
-
-    Tick read(PacketPtr pkt) override;
-    Tick write(PacketPtr pkt) override;
+    Addr dmaAddr(const PciBusAddr &addr, Addr pci_addr) const override;
 
-    void serialize(CheckpointOut &cp) const override;
-    void unserialize(CheckpointIn &cp) override;
+  protected:
+    const AddrRange pioRange;
+    const Tick pioDelay;
 };
 
 #endif // __TSUNAMI_PCHIP_HH__