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| author | Geoffrey Blake <Geoffrey.Blake@arm.com> | 2013-10-31 13:41:13 -0500 |
|---|---|---|
| committer | Geoffrey Blake <Geoffrey.Blake@arm.com> | 2013-10-31 13:41:13 -0500 |
| commit | c32fbb7c008d86abc59f56c93b1ff5876fff0ab3 (patch) | |
| tree | 7ea346abfcb7bf1c55d6fccec0d358e042993856 /src/dev/arm/Gic.py | |
| parent | be4aa2b6ba0b70b13df2ad84a372320c5a7ea939 (diff) | |
| download | gem5-c32fbb7c008d86abc59f56c93b1ff5876fff0ab3.tar.xz | |
dev: Add support for MSI-X and Capability Lists for ARM and PCI devices
This patch adds the registers and fields to the PCI device to support
Capability lists and to support MSI-X in the GIC.
Diffstat (limited to 'src/dev/arm/Gic.py')
| -rw-r--r-- | src/dev/arm/Gic.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/dev/arm/Gic.py b/src/dev/arm/Gic.py index 0461758ed..766049296 100644 --- a/src/dev/arm/Gic.py +++ b/src/dev/arm/Gic.py @@ -54,8 +54,8 @@ class Pl390(BaseGic): dist_addr = Param.Addr(0x1f001000, "Address for distributor") cpu_addr = Param.Addr(0x1f000100, "Address for cpu") + msix_addr = Param.Addr(0x0, "Address for MSI-X register") dist_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to distributor") cpu_pio_delay = Param.Latency('10ns', "Delay for PIO r/w to cpu interface") int_latency = Param.Latency('10ns', "Delay for interrupt to get to CPU") it_lines = Param.UInt32(128, "Number of interrupt lines supported (max = 1020)") - |