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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-05-23 13:46:56 +0100 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2015-05-23 13:46:56 +0100 |
commit | f3f06e1684c6575e25b965ab0585473bb47e58cc (patch) | |
tree | 44323565da1216f180bef570762aa0f52249753a /src/dev/arm/RealView.py | |
parent | 6533f2000bcd6d01f59655491198950b4ebff80b (diff) | |
download | gem5-f3f06e1684c6575e25b965ab0585473bb47e58cc.tar.xz |
arm, dev: Add support for a memory mapped generic timer
There are cases when we don't want to use a system register mapped
generic timer, but can't use the SP804. For example, when using KVM on
aarch64, we want to intercept accesses to the generic timer, but can't
do so if it is using the system register interface. In such cases,
we need to use a memory-mapped generic timer.
This changeset adds a device model that implements the memory mapped
generic timer interface. The current implementation only supports a
single frame (i.e., one virtual timer and one physical timer).
Diffstat (limited to 'src/dev/arm/RealView.py')
-rw-r--r-- | src/dev/arm/RealView.py | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index 2d5ccc3f9..5365ac9de 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -141,6 +141,16 @@ class GenericTimer(SimObject): int_phys = Param.UInt32("Physical timer interrupt number") int_virt = Param.UInt32("Virtual timer interrupt number") +class GenericTimerMem(PioDevice): + type = 'GenericTimerMem' + cxx_header = "dev/arm/generic_timer.hh" + gic = Param.BaseGic(Parent.any, "GIC to use for interrupting") + + base = Param.Addr(0, "Base address") + + int_phys = Param.UInt32("Interrupt number") + int_virt = Param.UInt32("Interrupt number") + class PL031(AmbaIntDevice): type = 'PL031' cxx_header = "dev/arm/rtc_pl031.hh" |