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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-12-21 10:26:55 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-01-04 13:24:40 +0000 |
| commit | 90ed58bcb1791b36e2ecc585ff91b842b1d89610 (patch) | |
| tree | 510f5bf72b23269c1308c5765ee7f1d4d8302f24 /src/dev/arm/RealView.py | |
| parent | 75831ce5b7880b67c1aa2e0871ce16d5c01cadc7 (diff) | |
| download | gem5-90ed58bcb1791b36e2ecc585ff91b842b1d89610.tar.xz | |
dev-arm: Implement GIC-400 model from GicV2
Implementation registers for the GICv2 model currently hold values
referring to a GIC-400 implementation. This patch is making them
parametrizable so that it is possible to instantiate a GIC-400 model.
The patch is also modifying Realview platform to use new GIC-400 model
in lieau of GICv2.
Change-Id: I446db8c796ee3c2708af91e9139f0a6e7947321b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15277
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/dev/arm/RealView.py')
| -rw-r--r-- | src/dev/arm/RealView.py | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py index ba4214269..0ed7780a5 100644 --- a/src/dev/arm/RealView.py +++ b/src/dev/arm/RealView.py @@ -74,7 +74,7 @@ try: except ImportError: # KVM support wasn't compiled into gem5. Fallback to a # software-only GIC. - kvm_gicv2_class = GicV2 + kvm_gicv2_class = Gic400 pass class AmbaPioDevice(BasicPioDevice): @@ -574,7 +574,7 @@ class RealViewPBX(RealView): realview_io = RealViewCtrl(pio_addr=0x10000000) mcc = VExpressMCC() dcc = CoreTile2A15DCC() - gic = GicV2(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100) + gic = Gic400(cpu_addr=0x1f000100, dist_addr=0x1f001000, cpu_size=0x100) pci_host = GenericPciHost( conf_base=0x30000000, conf_size='256MB', conf_device_bits=16, pci_pio_base=0) @@ -721,7 +721,7 @@ class VExpress_EMM(RealView): dcc = CoreTile2A15DCC() ### On-chip devices ### - gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000) + gic = Gic400(dist_addr=0x2C001000, cpu_addr=0x2C002000) vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25) local_cpu_timer = CpuLocalTimer(int_timer=ArmPPI(num=29), @@ -820,7 +820,8 @@ class VExpress_EMM(RealView): InterruptLine=2, InterruptPin=2) def enableMSIX(self): - self.gic = GicV2(dist_addr=0x2C001000, cpu_addr=0x2C002000, it_lines=512) + self.gic = Gic400(dist_addr=0x2C001000, cpu_addr=0x2C002000, + it_lines=512) self.gicv2m = Gicv2m() self.gicv2m.frames = [Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2C1C0000)] |