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| author | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:36 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:36 -0500 |
| commit | fffdc6a45019639cd8f899fa81eeb732db3e6f8c (patch) | |
| tree | 83daf8a2680a8d45974c632ccc68055712f69d65 /src/dev/arm/a9scu.cc | |
| parent | 79b44773023fa7a5e3e83f70d9a4f4809b10b003 (diff) | |
| download | gem5-fffdc6a45019639cd8f899fa81eeb732db3e6f8c.tar.xz | |
dev: Fix the Pl111 timings by separating pixel and DMA clock
This patch fixes the Pl111 timings by creating a separate clock for
the pixel timings. The device clock is used for all interactions with
the memory system, just like the AHB clock on the actual module.
The result without this patch is that the module only is allowed to
send one request every tick of the 24MHz clock which causes a huge
backlog.
Diffstat (limited to 'src/dev/arm/a9scu.cc')
0 files changed, 0 insertions, 0 deletions