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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2012-10-25 14:05:24 +0100
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2012-10-25 14:05:24 +0100
commit81be8b9d157a038c1d8f3ebf7e2ec8eba0eac935 (patch)
treea10132c3d1938bab3cd79626aead978ca1760d20 /src/dev/arm/base_gic.hh
parentb904bd5437ead0dfc2c4c0977f3d29d63299c601 (diff)
downloadgem5-81be8b9d157a038c1d8f3ebf7e2ec8eba0eac935.tar.xz
arm: Create a GIC base class and make the PL390 derive from it
This patch moves the GIC interface to a separate base class and makes all interrupt devices use that base class instead of a pointer to the PL390 implementation. This allows us to have multiple GIC implementations. Future implementations will allow in-kernel GIC implementations when using hardware virtualization. --HG-- rename : src/dev/arm/gic.cc => src/dev/arm/gic_pl390.cc rename : src/dev/arm/gic.hh => src/dev/arm/gic_pl390.hh
Diffstat (limited to 'src/dev/arm/base_gic.hh')
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diff --git a/src/dev/arm/base_gic.hh b/src/dev/arm/base_gic.hh
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+/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met: redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer;
+ * redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution;
+ * neither the name of the copyright holders nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * Authors: Andreas Sandberg
+ */
+
+/** @file
+ * Base class for ARM GIC implementations
+ */
+
+#ifndef __DEV_ARM_BASE_GIC_H__
+#define __DEV_ARM_BASE_GIC_H__
+
+#include "dev/io_device.hh"
+
+class Platform;
+
+class BaseGic : public PioDevice
+{
+ public:
+ typedef struct BaseGicParams Params;
+
+ BaseGic(const Params *p);
+ virtual ~BaseGic();
+
+ const Params * params() const;
+
+ /**
+ * Post an interrupt from a device that is connected to the GIC.
+ *
+ * Depending on the configuration, the GIC will pass this interrupt
+ * on through to a CPU.
+ *
+ * @param num number of interrupt to send
+ */
+ virtual void sendInt(uint32_t num) = 0;
+
+ /**
+ * Interface call for private peripheral interrupts.
+ *
+ * @param num number of interrupt to send
+ * @param cpu CPU to forward interrupt to
+ */
+ virtual void sendPPInt(uint32_t num, uint32_t cpu) = 0;
+
+ /**
+ * Clear an interrupt from a device that is connected to the GIC.
+ *
+ * Depending on the configuration, the GIC may de-assert it's CPU
+ * line.
+ *
+ * @param num number of interrupt to send
+ */
+ virtual void clearInt(uint32_t num) = 0;
+
+ protected:
+ /** Platform this GIC belongs to. */
+ Platform *platform;
+};
+
+#endif