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authorPrakash Ramrakhyani <Prakash.Ramrakhyani@arm.com>2010-10-01 16:04:00 -0500
committerPrakash Ramrakhyani <Prakash.Ramrakhyani@arm.com>2010-10-01 16:04:00 -0500
commit9792bbc32400f522830ff8d92209c672d12440f3 (patch)
tree3ff0914c7f9fbde791317460bb48fa33c920d104 /src/dev/arm/gic.hh
parent521d68c82a2399bfe32f282aa58708103369b99c (diff)
downloadgem5-9792bbc32400f522830ff8d92209c672d12440f3.tar.xz
ARM: Fix some subtle bugs in the GIC
The GIC code can write to the registers with 8, 16, or 32 byte accesses which could set/clear different numbers of interrupts.
Diffstat (limited to 'src/dev/arm/gic.hh')
-rw-r--r--src/dev/arm/gic.hh15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/dev/arm/gic.hh b/src/dev/arm/gic.hh
index 6ec83a58c..83b89f060 100644
--- a/src/dev/arm/gic.hh
+++ b/src/dev/arm/gic.hh
@@ -138,6 +138,9 @@ class Gic : public PioDevice
* one bit per interrupt, 32 bit per word = 32 words */
uint32_t activeInt[32];
+ /** read only running priroity register, 1 per cpu*/
+ uint32_t iccrpr[8];
+
/** an 8 bit priority (lower is higher priority) for each
* of the 1020 possible supported interrupts.
*/
@@ -164,6 +167,9 @@ class Gic : public PioDevice
/** highest interrupt that is interrupting CPU */
uint32_t cpuHighestInt[8];
+ /** IRQ Enable Used for debug */
+ bool irqEnable;
+
/** software generated interrupt
* @param data data to decode that indicates which cpus to interrupt
*/
@@ -174,6 +180,10 @@ class Gic : public PioDevice
*/
void updateIntState(int hint);
+ /** Update the register that records priority of the highest priority
+ * active interrupt*/
+ void updateRunPri();
+
int intNumToWord(int num) const { return num >> 5; }
int intNumToBit(int num) const { return num % 32; }
@@ -232,6 +242,11 @@ class Gic : public PioDevice
* @param number number of interrupt to send */
void clearInt(uint32_t number);
+ /* Various functions fer testing and debugging */
+ void driveSPI(uint32_t spi);
+ void driveLegIRQ(bool state);
+ void driveLegFIQ(bool state);
+ void driveIrqEn(bool state);
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string &section);