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author | Curtis Dunham <Curtis.Dunham@arm.com> | 2017-02-14 15:09:18 -0600 |
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committer | Curtis Dunham <Curtis.Dunham@arm.com> | 2017-02-14 15:09:18 -0600 |
commit | d3bfc03688e164c02e9c25730ada11b669c01eda (patch) | |
tree | 06fb4a1e878fbf5653fa6220531127e043626dac /src/dev/arm/gic_pl390.cc | |
parent | ca0fd665dcf6a4aeda07955d3898b03204c88fd8 (diff) | |
download | gem5-d3bfc03688e164c02e9c25730ada11b669c01eda.tar.xz |
sim,kvm,arm: fix typos
Change-Id: Ifc65d42eebfd109c1c622c82c3c3b3e523819e85
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/dev/arm/gic_pl390.cc')
-rw-r--r-- | src/dev/arm/gic_pl390.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/dev/arm/gic_pl390.cc b/src/dev/arm/gic_pl390.cc index 3c6fed712..e7dc8e907 100644 --- a/src/dev/arm/gic_pl390.cc +++ b/src/dev/arm/gic_pl390.cc @@ -542,7 +542,7 @@ Pl390::writeCpu(PacketPtr pkt) case GICC_EOIR: iar = pkt->get<uint32_t>(); if (iar.ack_id < SGI_MAX) { - // Clear out the bit that corrseponds to the cleared int + // Clear out the bit that corresponds to the cleared int uint64_t clr_int = ULL(1) << (ctx + 8 * iar.cpu_id); if (!(cpuSgiActive[iar.ack_id] & clr_int) && !(cpuSgiActiveExt[ctx] & (1 << iar.ack_id))) @@ -709,7 +709,7 @@ Pl390::updateIntState(int hint) DPRINTF(GIC, "Checking for interrupt# %d \n",int_nm); /* Set current pending int as highest int for current cpu if the interrupt's priority higher than current priority - and if currrent cpu is the target (for mp configs only) + and if current cpu is the target (for mp configs only) */ if ((bits(getIntEnabled(cpu, x), y) &bits(getPendingInt(cpu, x), y)) && @@ -775,7 +775,7 @@ Pl390::updateRunPri() void Pl390::sendInt(uint32_t num) { - DPRINTF(Interrupt, "Received Interupt number %d, cpuTarget %#x: \n", + DPRINTF(Interrupt, "Received Interrupt number %d, cpuTarget %#x: \n", num, cpuTarget[num]); if ((cpuTarget[num] & (cpuTarget[num] - 1)) && !gem5ExtensionsEnabled) panic("Multiple targets for peripheral interrupts is not supported\n"); |