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| author | Curtis Dunham <Curtis.Dunham@arm.com> | 2017-03-09 17:30:59 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-04-03 16:51:46 +0000 |
| commit | 60075068ea6340e89a4b0cd4bd79c6ee3de44893 (patch) | |
| tree | 391663eba868150dfb0baa3c823c1852af99fcdb /src/dev/arm/gic_pl390.hh | |
| parent | 2f14baaabca315e078597e3441bf8cf3dc703264 (diff) | |
| download | gem5-60075068ea6340e89a4b0cd4bd79c6ee3de44893.tar.xz | |
arm, dev: add basic support for GICC_BPR register
The Binary Point Register (BPR) specifies which bits belong to the
group priority field (which are used for preemption) and which to the
subpriority field (which are ignored for preemption).
Change-Id: If51e669d23b49047b69b82ab363dd01a936cc93b
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2443
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Weiping Liao <weipingliao@google.com>
Diffstat (limited to 'src/dev/arm/gic_pl390.hh')
| -rw-r--r-- | src/dev/arm/gic_pl390.hh | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/dev/arm/gic_pl390.hh b/src/dev/arm/gic_pl390.hh index 210f91cfc..8beb5e2d5 100644 --- a/src/dev/arm/gic_pl390.hh +++ b/src/dev/arm/gic_pl390.hh @@ -111,6 +111,10 @@ class Pl390 : public BaseGic static const int INT_LINES_MAX = 1020; static const int GLOBAL_INT_LINES = INT_LINES_MAX - SGI_MAX - PPI_MAX; + /** minimum value for Binary Point Register ("IMPLEMENTATION DEFINED"); + chosen for consistency with Linux's in-kernel KVM GIC model */ + static const int GICC_BPR_MINIMUM = 2; + BitUnion32(SWI) Bitfield<3,0> sgi_id; Bitfield<23,16> cpu_list; @@ -276,6 +280,7 @@ class Pl390 : public BaseGic /** CPU priority */ uint8_t cpuPriority[CPU_MAX]; + uint8_t getCpuPriority(unsigned cpu); // BPR-adjusted priority value /** Binary point registers */ uint8_t cpuBpr[CPU_MAX]; |